參數(shù)資料
型號: A42MX24-1BG100
廠商: Electronic Theatre Controls, Inc.
英文描述: 40MX and 42MX FPGA Families
中文描述: 40MX和42MX FPGA系列
文件頁數(shù): 81/93頁
文件大?。?/td> 854K
代理商: A42MX24-1BG100
82
Data Device Corporation
www.ddc-web.com
BU-6474X/6484X/6486X
J-07/05-0
P3 PIN #
TABLE 71. BU-64863E8 EVALUATION BOARD PINOUTS (CONT.)
MADE FROM 80-PIN MINI-ACE MARK3 BU-64863G8 BC/RT/MT 64K RAM
DEVICE PIN #
FUNCTION
P4 PIN #
DEVICE PIN #
FUNCTION
1
14
SLEEPIN
1
41
D06
2
20
ADDR_LAT/MEMOE
2
-
NC
3
22, 31, 50, 70, 79
GND
3
43
D04
4
-
NC
4
42
D01
5
30, 51, 69
+3.3V_LOGIC
5
45
RTAD1
6
30, 51, 69
+3.3V_LOGIC
6
44
RTADP
7
22, 31, 50, 70, 79
GND
7
47
D02
8
22, 31, 50, 70, 79
GND
8
46
D00
9
22, 31, 50, 70, 79
GND
9
49
D05
10
23
TAG_CLK
10
48
D03
11
24
RTAD2
11
22, 31, 50, 70, 79
GND
12
22, 31, 50, 70, 79
GND
12
22, 31, 50, 70, 79
GND
13
25
MSTCLR
13
30, 51, 69
+3.3V_LOGIC
14
26
CLOCK_IN
14
30, 51, 69
+3.3V_LOGIC
15
22, 31, 50, 70, 79
GND
15
52
D08
16
27
A06
16
53
D07
17
28
ZEROWAIT/MEMWR
17
54
D13
18
29
16/8 / DTREQ
18
55
D12
19
30, 51, 69
+3.3V_LOGIC
19
56
D14
20
30, 51, 69
+3.3V_LOGIC
20
57
D09
21
-
NC
21
58
D11
22
-
NC
22
59
D15
23
32
INCMD/MCRST
23
60
D10
24
33
A01
24
-
NC
25
34
TRIG_SEL/MEMENA_IN
26
35
POL_SEL/DTACK
27
36
RT_AD_LAT
28
37
SSFLAG/EXT_TRIG
29
38
RTAD0
30
39
RTAD3
31
-
NC
32
40
RTAD4
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