參數(shù)資料
型號(hào)： A42MX24-1PQ100B
廠商： Electronic Theatre Controls, Inc.
英文描述： TRANSF 600 OHM 0MA DC TEL
中文描述： 40MX和42MX FPGA系列
文件頁(yè)數(shù)： 22/93頁(yè)
文件大小： 854K
代理商： A42MX24-1PQ100B
29
Data Device Corporation
www.ddc-web.com
BU-6474X/6484X/6486X
J-07/05-0
FIGURE 7. RT DOUBLE BUFFERED MODE
15
13
0
BLOCK STATUS WORD
TIME TAG WORD
DATA BLOCK POINTER
RECEIVED COMMAND
WORD
CONFIGURATION
REGISTER
STACK
POINTERS
DESCRIPTOR
STACK
CURRENT
AREA B/A
DATA
BLOCKS
DATA
BLOCK 1
DATA
BLOCK 0
X..X 0 YYYYY
X..X 1 YYYYY
RECEIVE DOUBLE
BUFFER ENABLE
SUBADDRESS
CONTROL WORD
MSB
DATA BLOCK POINTER
LOOK-UP
TABLES
FIGURE 8. RT CIRCULAR BUFFERED MODE
CIRCULAR
BUFFER
ROLLOVER
15
13
0
RECEIVED
(TRANSMITTED)
MESSAGE
DATA
(NEXT LOCATION)
128,
256
8192
WORDS
POINTER TO
CURRENT
DATA BLOCK
POINTER TO
NEXT DATA
BLOCK
LOOK-UP TABLE
ENTRY
CIRCULAR
DATA
BUFFER
LOOK-UP TABLES
LOOK-UP
TABLE
ADDRESS
BLOCK STATUS WORD
TIME TAG WORD
DATA BLOCK POINTER
RECEIVED COMMAND
WORD
CONFIGURATION
REGISTER
STACK
POINTERS
DESCRIPTOR
STACK
CURRENT
AREA B/A
1. TX/RS/BCST_SA look-up table entry is updated following valid receive (broadcast) message
or following completion of transmit message
Notes:
*
2. For the Global Circular Buffer Mode, the pointer is read from and re-written to Address 0101 (for Area A)
or Address 0105 (for Area B).
vides an additional option, a variable sized global circular buffer.
The Mini-ACE Mark3 RT allows for a mix of single buffered, dou-
ble buffered, and individually circular buffered subaddresses,
along with the use of the global double buffer for any arbitrary
group of receive(/broadcast) or broadcast subaddresses.
In the global circular buffer mode, the data for multiple receive
subaddresses is stored in the same circular buffer data structure.
The size of the global circular buffer may be programmed for 128,
256, 512, 1024, 2048, 4096, or 8192 words, by means of bits 11,
10, and 9 of Configuration Register #6. As shown in TABLE 40,
individual subaddresses may be mapped to the global circular
buffer by means of their respective subaddress control words.
The pointer to the Global Circular Buffer will be stored in location
0101 (for Area A), or location 0105 (for Area B).
The global circular buffer option provides a highly efficient
method for storing received message data. It allows for frequent-
ly used subaddresses to be mapped to individual data blocks,
while also providing a method for asynchronously received mes-
sages to infrequently used subaddresses to be logged to a com-
mon area. Alternatively, the global circular buffer provides an effi-
cient means for storing the received data words for all subad-
dresses. Under this method, all received data words are stored
chronologically, regardless of subaddress.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A42MX24-1PQ160 功能描述:IC FPGA MX SGL CHIP 36K 160-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:MX 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計(jì):6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23）
A42MX24-1PQ160I 功能描述:IC FPGA MX SGL CHIP 36K 160-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:MX 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計(jì):6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23）
A42MX24-1PQ160M 制造商:Microsemi Corporation 功能描述:FPGA 36K GATES 912 CELLS 0.45UM 3.3V/5V 160PQFP - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA MX SGL CHIP 36K 160-PQFP 制造商:Microsemi Corporation 功能描述:IC FPGA 125 I/O 160PQFP
A42MX24-1PQ208 功能描述:IC FPGA MX SGL CHIP 36K 208-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:MX 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計(jì):6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23）
A42MX24-1PQ208I 功能描述:IC FPGA MX SGL CHIP 36K 208-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:MX 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計(jì):6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23）
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