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參數(shù)資料
| 型號： | A42MX36-3BG100 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 40MX and 42MX FPGA Families |
| 中文描述： | 40MX和42MX FPGA系列 |
| 文件頁數(shù)： | 11/64頁 |
| 文件大?。?/td> | 854K |
| 代理商： | A42MX36-3BG100 |
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40MX and 42MX FPGA Families
v6.0
1-13
Development Tool Support
The MX family of FPGAs is fully supported by both Actel's
Libero Integrated Design Environment and Designer
FPGA Development software. Actel Libero IDE is a design
management environment that streamlines the design
flow. Libero IDE provides an integrated design manager
that seamlessly integrates design tools while guiding the
user through the design flow, managing all design and
log files, and passing necessary design data among tools.
Additionally, Libero IDE allows users to integrate both
schematic and HDL synthesis into a single flow and verify
the entire design in a single environment. Libero IDE
includes Synplify for Actel from Synplicity, ViewDraw
for Actel from Mentor Graphics, ModelSim HDL
Simulator from Mentor Graphics, WaveFormer Lite
from SynaptiCAD, and Designer software from Actel.
Refer to the Libero IDE flow (located on Actel’s website)
diagram for more information.
Actel's Designer software is a place-and-route tool and
provides a comprehensive suite of backend support tools
for FPGA development. The Designer software includes
timing-driven
place-and-route,
and
a
world-class
integrated static timing analyzer and constraints editor.
With the Designer software, a user can lock his/her
design pins before layout while minimally impacting the
results
of
place-and-route.
Additionally,
the
back-
annotation flow is compatible with all the major
simulators and the simulation results can be cross-probed
with Silicon Explorer II, Actel’s integrated verification
and logic analysis tool. Another tool included in the
Designer software is the ACTgen macro builder, which
easily
creates
popular
and
commonly
used
logic
functions for implementation into your schematic or HDL
design. Actel's Designer software is compatible with the
most popular FPGA design entry and verification tools
from companies such as Mentor Graphics, Synplicity,
Synopsys, and Cadence Design Systems. The Designer
software is available for both the Windows and UNIX
operating systems.
Actel's Designer software is compatible with the most
popular FPGA design entry and verification tools from
companies such as Mentor Graphics, Synplicity, Synopsys,
and Cadence Design Systems. The Designer software is
available for both the Windows and UNIX operating
systems.
Related Documents
Application Notes
User’s Guides and Manuals
Miscellaneous
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A42MX36-3PL100 | 40MX and 42MX FPGA Families |
| A42MX36-3PL100A | 40MX and 42MX FPGA Families |
| A42MX36-3PQ100A | 40MX and 42MX FPGA Families |
| A42MX36-3VQ100 | 40MX and 42MX FPGA Families |
| A42MX36-3VQ100A | 40MX and 42MX FPGA Families |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A42MX36-3BG272 | 功能描述:IC FPGA MX SGL CHIP 54K 272-PBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:MX 標準包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:129024 輸入/輸出數(shù):248 門數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP，帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP（75x75） |
| A42MX36-3BG272I | 功能描述:IC FPGA MX SGL CHIP 54K 272-PBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:MX 標準包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:129024 輸入/輸出數(shù):248 門數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP，帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP（75x75） |
| A42MX36-3BGG272 | 功能描述:IC FPGA MX SGL CHIP 54K 272-PBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:MX 標準包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:129024 輸入/輸出數(shù):248 門數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP，帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP（75x75） |
| A42MX36-3BGG272I | 功能描述:IC FPGA MX SGL CHIP 54K 272-PBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:MX 標準包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:129024 輸入/輸出數(shù):248 門數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP，帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP（75x75） |
| A42MX36-3PQ208 | 功能描述:IC FPGA MX SGL CHIP 54K 208-PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:MX 標準包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:129024 輸入/輸出數(shù):248 門數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP，帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP（75x75） |
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