參數(shù)資料
型號(hào)： A54SX08-2PLG84
廠(chǎng)商： Microsemi SoC
文件頁(yè)數(shù)： 20/64頁(yè)
文件大?。?/td> 0K
描述： IC FPGA SX 12K GATES 84-PLCC
標(biāo)準(zhǔn)包裝： 16
系列： SX
LAB/CLB數(shù)： 768
輸入/輸出數(shù)： 69
門(mén)數(shù)： 12000
電源電壓： 3 V ~ 3.6 V，4.75 V ~ 5.25 V
安裝類(lèi)型： 表面貼裝
工作溫度： 0°C ~ 70°C
封裝/外殼： 84-LCC（J 形引線(xiàn)）
供應(yīng)商設(shè)備封裝： 84-PLCC（29.31x29.31）
SX Family FPGAs
v3.2
1-23
Register Cell Timing Characteristics
Timing Characteristics
Timing characteristics for SX devices fall into three
categories: family-dependent, device-dependent, and
design-dependent.
The
input
and
output
buffer
characteristics are common to all SX family members.
Internal routing delays are device-dependent. Design
dependency means actual delays are not determined
until after placement and routing of the user’s design is
complete. Delay values may then be determined by using
the DirectTime Analyzer utility or performing simulation
with post-layout delays.
Critical Nets and Typical Nets
Propagation delays are expressed only for typical nets,
which are used for initial design performance evaluation.
Critical net delays can then be applied to the most time-
critical paths. Critical nets are determined by net
property assignment prior to placement and routing. Up
to 6% of the nets in a design may be designated as
critical, while 90% of the nets in a design are typical.
Long Tracks
Some nets in the design use long tracks. Long tracks are
special routing resources that span multiple rows,
columns, or modules. Long tracks employ three and
sometimes five antifuse connections. This increases
capacitance and resistance, resulting in longer net delays
for macros connected to long tracks. Typically up to 6
percent of nets in a fully utilized device require long
tracks. Long tracks contribute approximately 4 ns to 8.4
ns delay. This additional delay is represented statistically
in higher fanout (FO = 24) routing delays in the
datasheet specifications section.
Timing Derating
SX devices are manufactured in a CMOS process.
Therefore, device performance varies according to
temperature, voltage, and process variations. Minimum
timing parameters reflect maximum operating voltage,
minimum
operating
temperature,
and
best-case
processing.
Maximum
timing
parameters
reflect
minimum
operating
voltage,
maximum
operating
temperature, and worst-case processing.
Figure 1-17 Flip-Flops
t
CLR
(positive edge triggered)
D
CLK
CLR
PRESET
Q
D
CLK
Q
CLR
PRESET
t
HPWH'
t
WASYN
t
HD
t
SUD
t
HP
t
HPWL
'
t
RCO
t
PRESET
RPWL
RPWH
相關(guān)PDF資料
PDF描述
A54SX08-2PL84 IC FPGA SX 12K GATES 84-PLCC
A3P1000L-FG256I IC FPGA 1KB FLASH 1M 256-FBGA
A3P1000L-FGG256I IC FPGA 1KB FLASH 1M 256-FBGA
977-009-010R031 BACKSHELL DB9 GREY PLASTIC
CAT93C86VI-GT3 IC EEPROM 16KBIT 3MHZ 8SOIC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A54SX08-2PLG84I 功能描述:IC FPGA SX 12K GATES 84-PLCC RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:SX 標(biāo)準(zhǔn)包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計(jì):- 輸入/輸出數(shù):360 門(mén)數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類(lèi)型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FPBGA（27X27）
A54SX08-2PQ208 功能描述:IC FPGA SX 12K GATES 208-PQFP RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:SX 標(biāo)準(zhǔn)包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計(jì):- 輸入/輸出數(shù):360 門(mén)數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類(lèi)型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FPBGA（27X27）
A54SX08-2PQ208I 功能描述:IC FPGA SX 12K GATES 208-PQFP RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:SX 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計(jì):6635520 輸入/輸出數(shù):270 門(mén)數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類(lèi)型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23）
A54SX08-2PQ208M 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:54SX Family FPGAs
A54SX08-2PQ208PP 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:54SX Family FPGAs
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠(chǎng)商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*