• <li id="1vgod"><form id="1vgod"></form></li>
      參數(shù)資料
      型號: A54SX08-2VQ100I
      英文描述: Field Programmable Gate Array (FPGA)
      中文描述: 現(xiàn)場可編程門陣列(FPGA)
      文件頁數(shù): 13/36頁
      文件大?。?/td> 833K
      代理商: A54SX08-2VQ100I
      v2.0
      13
      54SX Family FPGAs RadTolerant and HiRel
      Power Dissipation
      P = [I
      CC
      standby + I
      CC
      active] * V
      CCA
      + I
      OL
      * V
      OL
      * N +
      I
      OH
      *(V
      CCA
      V
      OH
      ) * M
      where:
      I
      CC
      standby is the current flowing when no inputs or
      outputs are changing.
      I
      CC
      active is the current flowing due to CMOS switching.
      I
      OL
      , I
      OH
      are TTL sink/source currents.
      V
      OL
      , V
      OH
      are TTL level output voltages.
      N equals the number of outputs driving TTL loads to V
      OL
      .
      M equals the number of outputs driving TTL loads to V
      OH
      .
      Accurate values for N and M are difficult to determine
      because they depend on the design and on the system I/O.
      The power can be divided into two components: static and
      active.
      Static Power Component
      The power due to standby current is typically a small
      component of the overall power. Standby power is shown
      below for military, worst case conditions (70
      °
      C).
      I
      CC
      V
      CC
      20 mA
      3.6V
      Active Power Component
      Power dissipation in CMOS devices is usually dominated by
      the active (dynamic) power dissipation. This component is
      frequency-dependent, a function of the logic and the
      external I/O. Active power dissipation results from charging
      internal
      chip
      capacitances
      unprogrammed antifuses, module inputs, and module
      outputs, plus external capacitance due to PC board traces
      of
      the
      interconnect,
      and load device inputs. An additional component of the
      active power dissipation is the totempole current in CMOS
      transistor pairs. The net effect can be associated with an
      equivalent capacitance that can be combined with
      frequency and voltage to represent active power dissipation.
      Equivalent Capacitance
      The power dissipated by a CMOS circuit can be expressed by
      Equation 1:
      Power (μW) = C
      EQ
      * V
      CCA2
      * F
      where:
      C
      EQ
      = Equivalent capacitance in pF
      V
      CCA
      = Power supply in volts (V)
      F
      = Switching frequency in MHz
      (1)
      Equivalent capacitance is calculated by measuring
      I
      CC
      active at a specified frequency and voltage for each
      circuit component of interest. Measurements have been
      made over a range of frequencies at a fixed value of V
      CCA
      .
      Equivalent capacitance is frequency-independent so that
      the results may be used over a wide range of operating
      conditions. Equivalent capacitance values are shown below.
      C
      EQ
      Values (pF)
      To calculate the active power dissipated from the complete
      design, the switching frequency of each part of the logic
      must be known. Equation 2 shows a piece-wise linear
      summation over all components.
      Power =V
      CCA2
      * [(m * C
      EQM
      * f
      m
      )
      modules
      +
      (n * C
      EQI
      * f
      n
      )
      inputs
      + (p * (C
      EQO
      + C
      L
      ) * f
      p
      )
      outputs
      +
      0.5 * (q
      1
      * C
      EQCR
      * f
      q1
      )
      routed_Clk1
      + (r
      1
      * f
      q1
      )
      routed_Clk1
      +
      0.5 * (q
      2
      * C
      EQCR
      * f
      q2
      )
      routed_Clk2
      + (r
      2
      * f
      q2
      )
      routed_Clk2
      +
      0.5 * (s
      1
      * C
      EQCD
      * f
      s1
      )
      dedicated_CLK
      ]
      (2)
      Power
      72 mW
      RT54SX16
      A54SX16
      RT54SX32
      A54SX32
      Equivalent Capacitance (pF)
      Modules
      C
      EQM
      C
      EQI
      C
      EQO
      C
      EQCR
      C
      EQCD
      7.0
      3.9
      7.0
      3.9
      Input Buffers
      2.0
      1.0
      2.0
      1.0
      Output Buffers
      10.0
      5.0
      10.0
      5.0
      Routed Array Clock Buffer Loads
      0.4
      0.2
      0.6
      0.3
      Dedicated Clock Buffer Loads
      0.25
      0.15
      0.34
      0.23
      Fixed Capacitance (pF)
      routed_Clk1
      r
      1
      r
      2
      120
      60
      210
      107
      routed_Clk2
      120
      60
      210
      107
      Fixed Clock Loads
      Clock Loads on Dedicated Array Clock
      s
      1
      528
      528
      1,080
      1,080
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      A54SX08-2VQG100 功能描述:IC FPGA SX 12K GATES 100-VQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:SX 標(biāo)準(zhǔn)包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計:- 輸入/輸出數(shù):360 門數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FPBGA(27X27)