參數資料
型號： A54SX08P-2PL208
廠商： Electronic Theatre Controls, Inc.
元件分類： FPGA
英文描述： 54SX Family FPGAs
中文描述： 54SX家庭的FPGA
文件頁數： 28/57頁
文件大?。?/td> 415K
代理商： A54SX08P-2PL208
5 4 S X F a m ily F P G A s
28
v3.1
A 5 4 S X 1 6 T im ing C ha ra c t e ris t ic s
(c ontinue d)
(Wors t-C a s e C omme rc ia l C onditions )
‘–3’ Speed
‘–2’ Speed
‘–1’ Speed
‘Std’ Speed
Parameter
Description
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Units
Dedicated (Hard-Wired) Array Clock Network
t
HCKH
Input LOW to HIGH
(Pad to R-Cell Input)
1.2
1.4
1.5
1.8
ns
t
HCKL
Input HIGH to LOW
(Pad to R-Cell Input)
1.2
1.4
1.6
1.9
ns
t
HPWH
t
HPWL
t
HCKSW
t
HP
f
HMAX
Minimum Pulse Width HIGH
1.4
1.6
1.8
2.1
ns
Minimum Pulse Width LOW
1.4
1.6
1.8
2.1
ns
Maximum Skew
0.2
0.2
0.3
0.3
ns
Minimum Period
2.7
3.1
3.6
4.2
ns
Maximum Frequency
350
320
280
240
MHz
Routed Array Clock Networks
t
RCKH
Input LOW to HIGH (Light Load)
(Pad to R-Cell Input)
1.6
1.8
2.1
2.5
ns
t
RCKL
Input HIGH to LOW (Light Load)
(Pad to R-Cell Input)
1.8
2.0
2.3
2.7
ns
t
RCKH
Input LOW to HIGH (50% Load)
(Pad to R-Cell Input)
1.8
2.1
2.5
2.8
ns
t
RCKL
Input HIGH to LOW (50% Load)
(Pad to R-Cell Input)
2.0
2.2
2.5
3.0
ns
t
RCKH
Input LOW to HIGH (100% Load)
(Pad to R-Cell Input)
1.8
2.1
2.4
2.8
ns
t
RCKL
Input HIGH to LOW (100% Load)
(Pad to R-Cell Input)
2.0
2.2
2.5
3.0
ns
t
RPWH
t
RPWL
t
RCKSW
t
RCKSW
t
RCKSW
TTL Output ModuleTiming
1
Min. Pulse Width HIGH
2.1
2.4
2.7
3.2
ns
Min. Pulse Width LOW
2.1
2.4
2.7
3.2
ns
Maximum Skew (Light Load)
0.5
0.5
0.5
0.7
ns
Maximum Skew (50% Load)
0.5
0.6
0.7
0.8
ns
Maximum Skew (100% Load)
0.5
0.6
0.7
0.8
ns
t
DLH
t
DHL
t
ENZL
t
ENZH
t
ENLZ
t
ENHZ
Note:
1.
Data-to-Pad LOW to HIGH
1.6
1.9
2.1
2.5
ns
Data-to-Pad HIGH to LOW
1.6
1.9
2.1
2.5
ns
Enable-to-Pad, Z to L
2.1
2.4
2.8
3.2
ns
Enable-to-Pad, Z to H
2.3
2.7
3.1
3.6
ns
Enable-to-Pad, L to Z
1.4
1.7
1.9
2.2
ns
Enable-to-Pad, H to Z
1.3
1.5
1.7
2.0
ns
Delays based on 35 pF loading, except t
ENZL
and t
ENZH
. For t
ENZL
and t
ENZH
the loading is 5 pF.
相關PDF資料
PDF描述
A54SX08P-2PL208I 54SX Family FPGAs
A54SX08P-2PL208M 54SX Family FPGAs
A54SX08P-2PL208PP 54SX Family FPGAs
A54SX08P-3VQ208I 54SX Family FPGAs
A54SX08P-3VQ208M 54SX Family FPGAs
相關代理商/技術參數
參數描述
A54SX08P-2PL208I 制造商:未知廠家 制造商全稱:未知廠家 功能描述:54SX Family FPGAs
A54SX08P-2PL208M 制造商:未知廠家 制造商全稱:未知廠家 功能描述:54SX Family FPGAs
A54SX08P-2PL208PP 制造商:未知廠家 制造商全稱:未知廠家 功能描述:54SX Family FPGAs
A54SX08P-2PLG208 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:SX Family FPGAs
A54SX08-P-2PLG208I 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:SX Family FPGAs
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