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參數(shù)資料
| 型號： | A54SX72A-PQG208A |
| 廠商： | Microsemi SoC |
| 文件頁數(shù)： | 17/108頁 |
| 文件大小： | 0K |
| 描述： | IC FPGA SX-A 108K 208-PQFP |
| 標準包裝： | 24 |
| 系列： | SX-A |
| LAB/CLB數(shù)： | 6036 |
| 輸入/輸出數(shù)： | 171 |
| 門數(shù)： | 108000 |
| 電源電壓： | 2.25 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 208-BFQFP |
| 供應(yīng)商設(shè)備封裝： | 208-PQFP（28x28） |
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SX-A Family FPGAs
1- 12
v5.3
SX-A Probe Circuit Control Pins
SX-A devices contain internal probing circuitry that
provides built-in access to every node in a design,
enabling 100% real-time observation and analysis of a
device's internal logic nodes without design iteration.
The probe circuitry is accessed by Silicon Explorer II, an
easy to use, integrated verification and logic analysis tool
that can sample data at 100 MHz (asynchronous) or
66 MHz (synchronous). Silicon Explorer II attaches to a
PC’s standard COM port, turning the PC into a fully
functional 18-channel logic analyzer. Silicon Explorer II
allows designers to complete the design verification
process at their desks and reduces verification time from
several hours per cycle to a few seconds.
The Silicon Explorer II tool uses the boundary-scan ports
(TDI, TCK, TMS, and TDO) to select the desired nets for
verification. The selected internal nets are assigned to the
PRA/PRB pins for observation. Figure 1-13 illustrates the
interconnection between Silicon Explorer II and the FPGA
to perform in-circuit verification.
Design Considerations
In order to preserve device probing capabilities, users
should avoid using the TDI, TCK, TDO, PRA, and PRB pins
as input or bidirectional ports. Since these pins are active
during probing, critical input signals through these pins
are not available. In addition, the security fuse must not
be programmed to preserve probing capabilities. Actel
recommends that you use a 70
Ω series termination
resistor on every probe connector (TDI, TCK, TMS, TDO,
PRA, PRB). The 70
Ω series termination is used to prevent
data
transmission
corruption
during
probing
and
reading back the checksum.
Figure 1-13 Probe Setup
16
Additional
Channels
SX-A FPGA
70
Ω
70
Ω
70
Ω
70
Ω
70
Ω
70
Ω
TDI
TCK
TMS
TDO
PRA
PRB
Serial Connection
Silicon Explorer II
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A54SX72A-PQG208I | 功能描述:IC FPGA SX-A 108K 208-PQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:SX-A 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標準包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計:6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23） |
| A54SX72A-PQG208M | 制造商:Microsemi Corporation 功能描述:FPGA SX-A Family 72K Gates 4024 Cells 217MHz 0.25um Technology 2.5V 208-Pin PQFP 制造商:Microsemi Corporation 功能描述:FPGA SX-A 72K GATES 4024 CELLS 217MHZ 0.25UM/0.22UM 2.5V 208 - Trays |
| A54SX72A-PQG208X3 | 制造商:Microsemi Corporation 功能描述:SX-A 72K GATE 4024 MC 217MHZ COMM ANTIFUSE 2.5/3.3/5V 208QFP - Trays |
| A55 | 制造商:M/A-COM Technology Solutions 功能描述:GAIN BLOCK |
| A5-5 | 制造商:MA-COM 制造商全稱:M/A-COM Technology Solutions, Inc. 功能描述:Cascadable Amplifier 5 to 500 MHz |
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