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參數(shù)資料
| 型號： | A8904SLP-T |
| 元件分類： | 運(yùn)動控制電子 |
| 英文描述： | BRUSHLESS DC MOTOR CONTROLLER, 1.4 A, PDSO28 |
| 封裝： | 1.20 MM HEIGHT, LEAD FREE, TSSOP-28 |
| 文件頁數(shù)： | 5/18頁 |
| 文件大?。?/td> | 736K |
| 代理商： | A8904SLP-T |
3-Phase Brushless DC Motor Controller/Driver
with Back EMF Sensing
A8904
13
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
In applications where both internal and external TACH sig-
nals are used, it is important to only switch between modes when
the SYNC signal on DATA OUT is low. This ensures the speed
control information that is being processed during the transition,
is not corrupted. SYNC is accessed through the DATA OUT
multiplexer, which is controlled by D22 & D23.
DATA OUT.
The DATA OUT terminal is the output of a
2-bit input multiplexer controlled by D22 & D23 of the serial
port. Data available are TACH signal (internally or externally
generated), SYNC signal, FCOM signal, and thermal shutdown
(LOW = A8904 operating within thermal limits, HIGH = thermal
shutdown has occurred).
Speed loop initialization (YANK).
To ensure rapid
transition from start-up to the normal operating condition, the
FILTER terminal is pulled up to the lter threshold voltage,
VFILTERTH, by the internal YANK command and the initial output
current will be set to the maximum selected current limit. This
condition is maintained until the motor reaches the correct speed
and the rst ERROR FAST signal is produced which removes
the YANK and allows linear current control.
The YANK feature is also activated when an external
speed control scheme is used (D24 = 1). To ensure the YANK is
Functional Description (cont’d)
released at start-up by the internal speed control, it is important
to ensure the speed reference is set at a lower speed than what
the motor is designed to run at. Note that when the serial port is
programmed to run initially, the default condition for the speed
is set for the slowest condition so this will guarantee the YANK
to be released. It is important when using external speed control
that, as a minimum, the number of poles, speed control mode,
and speed reference are programmed in the serial port.
Forward/reverse.
Directional control is managed through
D25 in the serial port.
Serial port.
Control features and diagnostic data selection
are communicated to the A8904 through the 29-bit serial port.
See serial port timing diagrams on page 6. When CHIP SELECT
is low, data is written to the serial port on the positive edge of
the clock with the MSB (D28) fed in rst. At the end of the write
cycle, the CHIP SELECT goes high, the serial port is disabled
and no more data can be transferred. In addition, the data written
to the serial port is latched and becomes active.
If a word of less than 29 bits is sent, the unused most sig-
nicant bits that are not programmed, are reset to zero. There
are no compatibility issues when using the A8904 in an existing
A8902-A application as the ve MSBs are reset to zero, which is
Speed and current control
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