參數(shù)資料
型號(hào): AAT1142IWP-1.8-T1
廠商: Advanced Analog Technology,lnc.
英文描述: 800mA Voltage-Scaling Step-Down Converter
中文描述: 800mA的電壓縮放降壓轉(zhuǎn)換器
文件頁(yè)數(shù): 16/22頁(yè)
文件大?。?/td> 982K
代理商: AAT1142IWP-1.8-T1
S
2
Cwire Serial Interface
AnalogicTech's S
2
Cwire serial interface is a propri-
etary high-speed single-wire interface. The S
2
Cwire
interface records rising edges of the EN/SET input
and decodes them into one of 32 registers which
determines the output voltage, as shown in Table 2.
Each state corresponds to an output voltage setting.
When using the S
2
Cwire interface, both I
2
C inputs
should be tied to the ground return. This disables
the I
2
C functionality.
S
2
Cwire Serial Interface Timing
The S
2
Cwire serial interface has flexible timing.
Data can be clocked-in at speeds up to 1MHz.
After data has been submitted, EN/SET is held
high to latch the data for a period T
LAT
. The output
is subsequently changed to the predetermined volt-
age. When EN/SET is set low for a time greater
than T
OFF
, the AAT1142 is disabled. When dis-
abled, the data register is reset to the default value.
AAT1142
800mA Voltage-Scaling Step-Down Converter
16
1142.2006.07.1.0
S
2
Cwire Timing Diagram
1
EN/SET
2
n-1
n
64
Data Reg
0
n-1
0
T
HI
T
LO
T
LAT
T
OFF
S
2
Cwire Output Voltage Programming
The AAT1142 is programmed through the S
2
Cwire
interface according to Table 2. The rising clock
edges received through the EN/SET pin corre-
sponding to a given data register determine the
output voltage set-point. Upon power-up and prior
to S
2
Cwire programming, the default output voltage
is set to 1.8V.
Table 2: AAT1142 S
2
Cwire Output Voltage
Programming Map.
Rising
Clock
Edges/
Data
Register
Rising
Clock
Edges/
Data
Register
Output
Voltage
(V)
Output
Voltage
(V)
1
2
3
4
5
6
7
8
9
No change
0.65
0.70
0.75
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
1.25
1.30
1.35
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1.40
1.45
1.50
1.55
1.60
1.65
1.70
1.75
1.80 (default)
1.85
1.90
1.95
2.00
2.00
2.00
2.00
10
11
12
13
14
15
16
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