參數(shù)資料
型號(hào): AAT3215IJS-2.85-T1
廠商: Advanced Analog Technology,lnc.
英文描述: 150mA CMOS High Performance LDO
中文描述: 150mA的LDO穩(wěn)壓器的CMOS高性能
文件頁(yè)數(shù): 14/18頁(yè)
文件大小: 358K
代理商: AAT3215IJS-2.85-T1
AAT3215
150mA CMOS High Performance LDO
14
3215.2006.05.1.6
Figure 2 shows the preferred method for the bypass
and output capacitor connections. For low output
noise and highest possible power supply ripple
rejection performance, it is critical to connect the
bypass and output capacitor directly to the LDO reg-
ulator ground pin. This method will eliminate any
load noise or ripple current feedback through the
LDO regulator.
Evaluation Board Layout
The AAT3215 evaluation layout follows the recom-
mend printed circuit board layout procedures and
can be used as an example for good application
layouts (see Figures 3, 4, and 5).
Note: Board layout shown is not to scale.
Figure 1: Common LDO Regulator Layout with C
BYP
Ripple Feedback Loop.
Figure 2: Recommended LDO Regulator Layout.
LDO
Regulator
C
BYP
C
OUT
R
TRACE
R
TRACE
R
TRACE
R
TRACE
C
IN
R
LOAD
V
IN
EN
GND
V
OUT
BYP
V
IN
GND
I
IN
I
LOAD
I
GND
I
RIPPLE
DC INPUT
I
LOAD
return + noise and ripple
I
BYP
only
LDO
Regulator
C
BYP
C
OUT
R
TRACE
R
TRACE
R
TRACE
R
TRACE
C
IN
R
LOAD
V
IN
EN
GND
V
OUT
BYP
I
LOAD
I
RIPPLE
I
IN
V
IN
GND
DC INPUT
I
GND
C
BYP
GND
LOOP
I
LOAD
return + noise and ripple
I
BYP
+ noise
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