參數(shù)資料
型號(hào)： AB-029
元件分類： 差分放大器
英文描述： AB-029 - INPUT FILTERING THE INA117 -200V DIFFERENCE AMPLIFIER
中文描述： 抗體- 029 -輸入過(guò)濾INA117 - 200伏差動(dòng)放大器
文件頁(yè)數(shù)： 12/42頁(yè)
文件大小： 606K
代理商： AB-029
12
+In
R
6
Q
2
Q
1
V
A
+
R
3
R
4
10
11
I
OS
C
DIFF
R
2
R
1
R
5
7
–
E
OS
C
1
4
I
EE
V+
–In
V–
10
FIGURE C3. Input Stage to the NPN–Input Op Amp Multiple Pole/Zero Macromodel.
R
4
Q
2
Q
1
V
A
+
R
5
R
6
13
14
15
16
11
12
+
–
I
OS
R
2
R
1
10
R
3
7
–
E
OS
I
CC
C
1
C
DIFF
3
2
4
V+
V–
+In
–In
FIGURE C4. Input Stage to the PNP–Input Op Amp Multiple Pole/Zero Macromodel.
The accuracy of this model topology compared to the stan-
dard and enhanced model topologies is improved for high
speed amplifiers primarily because of the improved gain/
phase performance. Assuming no convergence problem ex-
ists with the macromodels discussed so far, the time taken
for Spice to produce the dc operating point calculation of the
multiple pole/zero model is about twice the time required for
the standard model. For transient analysis using this model,
simulation time can be reduced by using the .OPTION
statement to increase the number of transient iterations from
10 to 40. The proper Spice command is:
.OPTIONS ITL4=40
The basic topology of input stages of this op amp model are
shown in Figures C1, C2, C3, and C4. The input stage is the
only section in the macromodels that differ between the four
types of op amps (N-Channel FET, P-Channel FET, NPN
Bipolar, and PNP Bipolar). The remainder of the macromodel
circuit (gain stages, phase stages, CMRR stage, and output
stage) is shown in a generic form in Figure C5. A summary
of the parameters modelled is listed in Table X.
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