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| 型號： | AB-104 |
| 文件頁數(shù)： | 4/6頁 |
| 文件大?。?/td> | 69K |
| 代理商： | AB-104 |
4
Although an INA at the inputs allows large voltage differ-
ences, dynamic overload at first produces the same error
currents as those using op amps. This problem is illus-
trated in Figure 7, which shows a discrete circuit using
three op amps.
mentioned, a FET INA such as the INA110 or INA111
prevents these error currents since no current path can arise
if there are no protection diodes. In addition, the FET INA
require no differential voltage protection circuitry.
One possible way to suppress error is to use a current
limitation circuit placed in the input line of the sense
amplifier. This circuit should either reduce the current as
much as possible or allow the bias current of the amplifier
to pass through with no voltage drop. This current limitation
must also float with the signal and must cause no significant
leakage currents when settled.
The first current limitation circuit considered here is a circuit
using a J-FET. During settling, the FET circuit must reduce
the current to a low value. After the amplifier has settled and
the current has fallen to the bias current of a few nanoampere,
the FET should return to its ohmic region. In this region, the
FET has a resistance of several thousand ohm. At the bias
current of a few nanoampere, the voltage drop would remain
a few microvolts and thus come close to the desired effect.
One J-FET with extremely low I
DDS
is the 2N4117A. The
2N4117A allows an I
DDS
of 30
μ
A to 90
μ
A. In the ohmic
region, with a current of only 2nA (equal to the bias current
of the INA114 or PGA204), the channel resistance is about
10k
(see Figure 8).
R
F
R
F
R
G
R
R
R
R
FIGURE 7. Instrumentation Amplifier.
In this configuration as well, the output of the input op amp
can follow the input signal only with a finite slew rate. As
described earlier, a current then flows through the protec-
tion diodes and R
F
. This is true both for the common-mode
voltages of the signal and for the differential signal itself.
At small gains, R
G
is high-impedance or is not present at all
(G = +1V/V). The error current then flows into the dynami-
cally overloaded input.
In larger gain ranges, R
G
becomes equal to or smaller than
R
F
. This factor can produce a current path to the other input,
which could load the source there unexpectedly. Fortunately,
the configuration is equipped with two diode paths in series
which prevent signal and common-mode steps of less than
1V from producing such an error. In addition, common-mode
steps produce a current in R
F
but not in R
G
since the voltage
drop in both protection circuits is almost the same size so that
there is no significant voltage change at R
G
. This advantage
is important, since especially during differential measure-
ments using the multiplexer, common-mode voltage differ-
ences can arise, while the gain can be far above 100V/V with
a correspondingly long settling time. The size of the error or
the error current can then only be calculated if the input
circuit and the resistances are known. This information is
generally given in the data sheet.
TIPS
As discussed in the section on op amps, the error current
most often causes an error in measurement when a capaci-
tive source is present or when a pulse-like current leads to
errors in the signal source or the supply line. As already
FIGURE 8. J-FET Characteristics.
50
25
0
0
0.5
1
OUTPUT CHARACTERISTICS
(V
GS(OFF)
= –0.7V)
V
GS
= 0V
V
DS
(V)
I
D
–0.1V
–0.2V
–0.3V
–0.4V
–0.5V
This single current source, which is connected to the source
at the gate, only operates for one polarity; otherwise, the
gate-channel diode is conductive. For this reason, two FETs
with opposite polarity are required for this configuration.
This circuit limits the overload current to less than 90
μ
A,
certainly a great improvement over the 800
μ
A mentioned
earlier. In combination with the 1
μ
F filter capacitor, the
circuit reduces the error to approximately 0.1mV. The re-
maining settling time of an INA, however, is more like 15
μ
s,
producing approximately 0.5mV.
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