- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄223306 > ACPL-J313-300 1 CHANNEL LOGIC OUTPUT OPTOCOUPLER PDF資料下載
參數(shù)資料
| 型號(hào)： | ACPL-J313-300 |
| 元件分類： | 光電耦合器 |
| 英文描述： | 1 CHANNEL LOGIC OUTPUT OPTOCOUPLER |
| 文件頁數(shù)： | 7/20頁 |
| 文件大小： | 449K |
| 代理商： | ACPL-J313-300 |
5
Applications Information
Eliminating Negative IGBT Gate Drive (Discussion applies to
ACPL-3130, ACPL-J313, and ACNW3130)
To keep the IGBT firmly off, the ACPL-3130 has a very
lowmaximumVOLspecificationof0.5V.TheACPL-3130
realizes this very low VOL by using a DMOS transistor
with 1 W (typical) on resistance in its pull down circuit.
WhentheACPL-3130isinthelowstate,theIGBTgateis
shorted to the emitter by Rg + 1 W. Minimizing Rg and
theleadinductancefromtheACPL-3130totheIGBTgate
and emitter (possibly by mounting the ACPL-3130 on a
smallPCboarddirectlyabovetheIGBT)caneliminatethe
needfornegativeIGBTgatedriveinmanyapplicationsas
showninFigure29.CareshouldbetakenwithsuchaPC
boarddesigntoavoidroutingtheIGBTcollectororemitter
traces close to the ACPL-3130 input as this can result in
unwanted coupling of transient signals into the ACPL-
3130 and degrade performance. (If the IGBT drain must
beroutedneartheACPL-3130input,thentheLEDshould
be reverse-biased when in the off state, to prevent the
transientsignalscoupledfromtheIGBTdrainfromturning
ontheACPL-3130.)
Figure 29. Recommended LED Drive and Application Circuit.
Selecting the Gate Resistor (Rg) to Minimize IGBT Switching
Losses. (Discussion applies to ACPL-3130, ACPL-J313 and
ACNW3130)
Step 1: Calculate Rg minimum from the IOL peak specification. The
IGBT and Rg in Figure 30 can be analyzed as a simple RC circuit
with a voltage supplied by the ACPL-3130.
The VOL value of 2 V in the previous equation is a
conservativevalueofVOLatthepeakcurrentof2.5A(see
Figure6).AtlowerRgvaluesthevoltagesuppliedbythe
ACPL-3130 is not an ideal voltage step. This results in
lowerpeakcurrents(moremargin)thanpredictedbythis
analysis.WhennegativegatedriveisnotusedVEEinthe
previousequationisequaltozerovolts.
Figure 30. ACPL-3130 Typical Application Circuit with Negative IGBT Gate Drive.
+ HVDC
3-PHASE
AC
- HVDC
0.1 F
VCC = 18 V
1
3
+
-
2
4
8
6
7
5
270
+5 V
CONTROL
INPUT
Rg
Q1
Q2
74XXX
OPEN
COLLECTOR
+ HVDC
3-PHASE
AC
- HVDC
0.1 F
VCC = 15 V
1
3
+
-
2
4
8
6
7
5
Rg
Q1
Q2
VEE = -5 V
-
+
270
+5 V
CONTROL
INPUT
74XXX
OPEN
COLLECTOR
=
+
=
≥
8
7.2
2.5
2
5
15
I
V
R
OLPEAK
OL
EE
CC
g
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ACPL-K342-000E | 1 CHANNEL LOGIC OUTPUT OPTOCOUPLER |
| ACPL-P454-500 | 1 CHANNEL LOGIC OUTPUT OPTOCOUPLER |
| ACR7HYA58CFREQ | TCXO, CLOCK, 0.5 MHz - 160 MHz, ACMOS OUTPUT |
| ACS7HXCB7CFREQ | TCXO, CLOCK, 0.5 MHz - 160 MHz, ACMOS OUTPUT |
| ACS5HXB17CFREQ | TCXO, CLOCK, 0.5 MHz - 160 MHz, ACMOS OUTPUT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ACPL-J313-300E | 功能描述:邏輯輸出光電耦合器 2.5A IGBT Gate Drive RoHS:否 制造商:Fairchild Semiconductor 絕緣電壓:4243 Vrms 輸出類型:Push-Pull 最大傳播延遲時(shí)間:500 ns 最大正向二極管電壓: 最大反向二極管電壓: 最大正向二極管電流: 最大連續(xù)輸出電流:2.5 A 最大功率耗散:100 mW 最大工作溫度:+ 100 C 最小工作溫度:- 40 C 封裝 / 箱體:SO-16 封裝:Tube |
| ACPL-J313-500E | 功能描述:邏輯輸出光電耦合器 2.5A IGBT Gate Drive RoHS:否 制造商:Fairchild Semiconductor 絕緣電壓:4243 Vrms 輸出類型:Push-Pull 最大傳播延遲時(shí)間:500 ns 最大正向二極管電壓: 最大反向二極管電壓: 最大正向二極管電流: 最大連續(xù)輸出電流:2.5 A 最大功率耗散:100 mW 最大工作溫度:+ 100 C 最小工作溫度:- 40 C 封裝 / 箱體:SO-16 封裝:Tube |
| ACPL-K24L-000E | 制造商:Avago Technologies 功能描述:OPTOCOUPLER |
| ACPL-K24L-060E | 制造商:Avago Technologies 功能描述:High Speed Optocouplers Optocoupler 5MBd |
| ACPL-K24L-500E | 功能描述:OPTOISO 5KV 2CH PUSH PULL 8SO 制造商:broadcom limited 系列:- 包裝:剪切帶（CT） 零件狀態(tài):在售 通道數(shù):2 輸入 - 輸入側(cè) 1/輸入側(cè) 2:2/0 電壓 - 隔離:5000Vrms 共模瞬態(tài)抗擾度（最小值）:25kV/μs 輸入類型:DC 輸出類型:推挽式/圖騰柱 電流 - 輸出/通道:10mA 數(shù)據(jù)速率:5MBd 傳播延遲 tpLH / tpHL（最大值）:250ns，250ns 上升/下降時(shí)間（典型值）:11ns，11ns 電壓 - 正向（Vf）（典型值）:1.5V 電流 - DC 正向（If）:8mA 電壓 - 電源:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.268"，6.81mm 寬） 供應(yīng)商器件封裝:8-SO 標(biāo)準(zhǔn)包裝:1 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。