參數(shù)資料
型號: ACT-SF128K16N-26P3C
廠商: Aeroflex Inc.
英文描述: ULTRA2 LVD SCSI CABLE 3FTVHDCI
中文描述: 行為SF128K16高速128Kx16的SRAM /閃存多芯片模塊
文件頁數(shù): 5/11頁
文件大?。?/td> 169K
代理商: ACT-SF128K16N-26P3C
5
Aeroflex Circuit Technology
SCD1677 REV A 4/28/98 Plainview NY (516) 694-6700
Flash AC Characteristics – Read Only Operations
(Vcc = 5.0V, Vss = 0V, T
C
= -55°C to +125°C)
Parameter
Symbol
JEDEC Stand’d
t
AVAV
t
AVQV
t
ELQV
t
GLQV
t
EHQZ
t
GHQZ
t
AXQX
–60
Min Max
60
–70
Min Max
70
–90
Min Max
90
Units
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable to Output Valid
Chip Enable to Output High Z (1)
Output Enable High to Output High Z(1)
Output Hold from Address, CE or OE Change, Whichever is First
Note 1. Guaranteed by design, but not tested
t
RC
t
ACC
t
CE
t
OE
t
DF
t
DF
t
OH
ns
ns
ns
ns
ns
ns
ns
60
60
30
20
20
70
70
35
20
20
90
90
40
25
25
0
0
0
Flash AC Characteristics – Write/Erase/Program Operations, FWE Controlled
(Vcc = 5.0V, Vss = 0V, T
C
= -55°C to +125°C)
Symbol
JEDEC Stand’d
Write Cycle Time
t
AVAC
Chip Enable Setup Time
t
ELWL
Write Enable Pulse Width
t
WLWH
Address Setup Time
t
AVWL
Data Setup Time
t
DVWH
Data Hold Time
t
WHDX
Address Hold Time
t
WLAX
Chip Enable Hold Time
t
WHEH
Write Enable Pulse Width High
t
WHWL
Duration of Byte Programming Operation
t
WHWH
1
Sector Erase Time
t
WHWH
2
Chip Erase Time
t
WHWH
3
Read Recovery Time before Write
t
GHWL
Vcc Setup Time
Output Enable Setup Time
Output Enable Hold Time
1
Note: 1. For Toggle and Data Polling.
Parameter
–60
Min Max
60
0
30
0
30
0
45
0
20
14
–70
Min Max
70
0
35
0
30
0
45
0
20
14
–90
Min Max
90
0
45
0
45
0
45
0
20
14
Units
t
WC
t
CE
t
WP
t
AS
t
DS
t
DH
t
AH
t
CH
t
WPH
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
Sec
Sec
μs
μs
Sec
ns
TYP
60
120
TYP
60
120
TYP
60
120
0
0
50
0
t
VCE
t
OES
t
OEH
50
50
12.5
12.5
12.5
10
10
10
Flash AC Characteristics – Write/Erase/Program Operations, FCE Controlled
(Vcc = 5.0V, Vss = 0V, T
C
= -55°C to +125°C)
Symbol
JEDEC Stand’d
Write Cycle Time
t
AVAC
Write Enable Setup Time
t
WLE
L
Chip Enable Pulse Width
t
ELEH
Address Setup Time
t
AVEL
Data Setup Time
t
DVEH
Data Hold Time
t
EHDX
Address Hold Time
t
ELAX
Write Enable Hold from Write Enable High
t
EHWH
Chip Enable Pulse Width High
t
EHEL
Duration of Byte Programming
t
WHWH
1
Sector Erase Time
t
WHWH
2
Chip Erase Time
t
WHWH
3
Read Recovery Time
t
GHEL
Chip Programming Time
Parameter
–60
Min Max
60
0
35
0
30
0
45
0
20
14
–70
Min Max
70
0
35
0
30
0
45
0
20
14
–90
Min Max
90
0
50
0
50
0
50
0
20
14
Units
t
WC
t
WS
t
CP
t
AS
t
DS
t
DH
t
AH
t
WH
t
CPH
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
Sec
Sec
ns
Sec
TYP
60
120
TYP
60
120
TYP
60
120
0
0
0
12.5
12.5
12.5
相關(guān)PDF資料
PDF描述
ACT-SF128K16N-26P7I ACT-SF128K16 High Speed 128Kx16 SRAM/FLASH Multichip Module
ACT-SF128K16N-39P3C UNKNOWN
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