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參數(shù)資料
| 型號： | AD12400JWS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 12-Bit 400 MSPS A/D Converter |
| 中文描述： | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS |
| 封裝： | 2.9 X 2.6 INCH, 0.6 INCH HEIGHT, MODULE |
| 文件頁數(shù)： | 11/28頁 |
| 文件大?。?/td> | 403K |
| 代理商： | AD12400JWS |
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AD12400
DEFINITIONS OF SPECIFICATIONS
Analog Bandwidth
The analog input frequency at which the spectral power of the
fundamental frequency (as determined by the FFT analysis) is
reduced by 3 dB.
Aperture Delay
The delay between the 50% point on the rising edge of the
ENCODE command and the instant at which the analog input
is sampled.
Aperture Uncertainty (Jitter)
The sample-to-sample variation in aperture delay.
Full-Scale Input Voltage Range
This is the maximum peak-to-peak input signal magnitude that
will result in a full-scale response, 0 dBFS on a single-tone input
signal case. Any magnitude increase from this value will result
in an over-range condition.
Analog Input VSWR (50 )
The Voltage Standing Wave Ratio is a ratio of the transmitted
and reflected signals. The VSWR can be related to input
impedance using the following equations:
Rev. 0 | Page 11 of 28
Impedance
Reference
=
Impedance
Load
Actual
1
1
=
Γ
+
Γ
=
+
=
Γ
S
Z
L
Z
VSWR
S
Z
L
Z
S
Z
L
Z
Differential Nonlinearity
The deviation of any code width from an ideal 1 LSB step.
Effective Number of Bits (ENOB)
Calculated from the measured SNR based on the equation
02
.
76
.
dB
SNR
ENOB
MEASURED
=
Encode Pulsewidth/Duty Cycle
Pulsewidth high is the minimum amount of time the ENCODE
pulse should be left in Logic 1 state to achieve rated perform-
ance; pulsewidth low is the minimum time the ENCODE pulse
should be left in low state. See timing implications of changing
t
ENCH
in the Application Notes, Encode Input section. At a
specified clock rate of 400 MSPS, these specifications define an
acceptable ENCODE duty cycle.
Full-Scale Input Power
Expressed in dBm. Computed using the following equation:
(
.
)
=
001
log
10
2
INPUT
SCALErms
FULL
SCALE
FULL
Z
V
POWER
Gain Error
The difference between the measured and ideal full-scale input
voltage range of the ADC.
Harmonic Distortion, Second
The ratio of the RMS signal amplitude to the RMS value of the
second harmonic component, reported in dBFS.
Harmonic Distortion, Third
The ratio of the RMS signal amplitude to the RMS value of the
third harmonic component, reported in dBFS.
Distortion, Image Spur
The ratio of the RMS signal amplitude to the RMS signal
amplitude of the image spur, reported in dBFS. The image spur,
a result of gain and phase errors between two time-interleaved
conversion channels, is located at fs/2 – f
AIN
.
Distortion, Offset Spur
The ratio of the RMS signal amplitude to the RMS signal
amplitude of the offset spur, reported in dBFS. The offset spur, a
result of offset errors between two time-interleaved conversion
channels, is located at fs/2.
Integral Nonlinearity
The deviation of the transfer function from a reference line
measured in fractions of 1 LSB using a “best straight line”
determined by a least square curve fit.
Minimum Conversion Rate
The minimum ENCODE rate at which the image spur
calibration will degrade no more than 1 dB (when image
spur is 70 dB).
Maximum Conversion Rate
The maximum ENCODE rate at which the image spur
calibration will degrade no more than 1 dB (when image
spur is 70 dB).
Output Propagation Delay
The delay between a differential crossing of ENCODE and
ENCODE (or zero crossing of a single-ended ENCODE).
Total Noise
Calculated as follows:
×
×
=
10
10
001
.
dBFS
dBc
dBm
SIGNAL
SNR
FS
NOISE
Z
V
where
Z
is the input impedance, FS is the full scale of the device
for the frequency in question, SNR is the value of the particular
input level, and
SIGNAL
is the signal level within the ADC
reported in dB below full scale. This value includes both
thermal and quantization noise.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD12400KWS | 制造商:Analog Devices 功能描述:ADC Dual 400Msps 12-bit Parallel/LVDS |
| AD12401 | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit, 400 MSPS A/D Converter |
| AD12401/KIT | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit, 400 MSPS A/D Converter |
| AD12401-326JWS | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit, 400 MSPS A/D Converter |
| AD12401-326KWS | 制造商:Analog Devices 功能描述:ADC Dual 326Msps 12-bit Parallel 120-Pin SMD |
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