參數(shù)資料
型號(hào): AD12400KWS
廠商: ANALOG DEVICES INC
元件分類(lèi): ADC
英文描述: 12-Bit 400 MSPS A/D Converter
中文描述: 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS
封裝: 2.9 X 2.6 INCH, 0.6 INCH HEIGHT, MODULE
文件頁(yè)數(shù): 12/28頁(yè)
文件大?。?/td> 403K
代理商: AD12400KWS
AD12400
Offset Error
The DC offset imposed on the input signal by the ADC,
reported in LSB (codes).
Pipeline Latency
The number of clock cycles that the output data will lag the
corresponding clock cycle.
Power Supply Rejection Ratio
The ratio of power supply voltage change to the resulting ADC
output voltage change.
Signal-to-Noise-and-Distortion (SINAD)
The ratio of the RMS signal amplitude (set 1 dB below full
scale) to the RMS value of the sum of all other spectral
components, including harmonics but excluding DC and image
spur.
Signal-to-Noise Ratio (SNR)
The ratio of the RMS signal amplitude (set at 1 dB below full
scale) to the RMS value of the sum of all other spectral
components, excluding the first five harmonics and DC.
Rev. 0 | Page 12 of 28
Spurious-Free Dynamic Range (SFDR)
The ratio of the RMS signal amplitude to the RMS value of the
peak spurious spectral component, except the image spur. The
peak spurious component may or may not be a harmonic. May
be reported in dBc (i.e., degrades as signal level is lowered) or
dBFS (always related back to converter full-scale).
Two-Tone Intermodulation Distortion Rejection
The ratio of the RMS value of either input tone to the RMS
value of the worst third-order intermodulation product;
reported in dBc.
Two-Tone SFDR
The ratio of the RMS value of either input tone to the RMS
value of the peak spurious component. The peak spurious
component may or may not be an IMD product. May be
reported in dBc (i.e., degrades as signal level is lowered) or in
dBFS (always related back to converter full-scale).
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