A0
參數(shù)資料
型號: AD1674KR
廠商: Analog Devices Inc
文件頁數(shù): 10/12頁
文件大?。?/td> 0K
描述: IC ADC 12BIT 100KSPS 28-SOIC
標準包裝: 1
位數(shù): 12
采樣率(每秒): 100k
數(shù)據(jù)接口: 并聯(lián)
轉換器數(shù)目: 1
功率耗散(最大): 825mW
電壓電源: 雙 ±
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應商設備封裝: 28-SOIC W
包裝: 管件
輸入數(shù)目和類型: 2 個單端,單極;2 個單端,雙極
AD1674
REV. C
–7–
PIN DESCRIPTION
Symbol
Pin No.
Type
Name and Function
AGND
9
P
Analog Ground (Common).
A0
4
DI
Byte Address/Short Cycle. If a conversion is started with A0 Active LOW, a full 12-bit conversion
cycle is initiated. If A0 is Active HIGH during a convert start, a shorter 8-bit conversion cycle
results. During Read (R/C = 1) with 12/8 LOW, A0 = LOW enables the 8 most significant bits
(DB4–DB11), and A0 = HIGH enables DB3–DB0 and sets DB7–DB4 = 0.
BIP OFF
12
AI
Bipolar Offset. Connect through a 50
resistor to REF OUT for bipolar operation or to Analog
Common for unipolar operation.
CE
6
DI
Chip Enable. Chip Enable is Active HIGH and is used to initiate a convert or read operation.
CS
3
DI
Chip Select. Chip Select is Active LOW.
DB11–DB8
27–24
DO
Data Bits 11 through 8. In the 12-bit format (see 12/8 and A0 pins), these pins provide the up-
per 4 bits of data. In the 8-bit format, they provide the upper 4 bits when A0 is LOW and are
disabled when A0 is HIGH.
DB7–DB4
23–20
DO
Data Bits 7 through 4. In the 12-bit format these pins provide the middle 4 bits of data. In the
8-bit format they provide the middle 4 bits when Ao is LOW and all zeroes when A0 is HIGH.
DB3–DB0
19–16
DO
Data Bits 3 through 0. In the 12-bit format these pins provide the lower 4 bits of data. In the
8-bit format these pins provide the lower 4 bits of data when A0 is HIGH, they are disabled
when A0 is LOW.
DGND
15
P
Digital Ground (Common).
REF OUT
8
AO
+10 V Reference Output.
R/C
5
DI
Read/Convert. In the full control mode R/C is Active HIGH for a read operation and Active LOW
for a convert operation. In the stand-alone mode, the falling edge of R/C initiates a conversion.
REF IN
10
AI
Reference Input is connected through a 50
resistor to +10 V Reference for normal operation.
STS
28
DO
Status is Active HIGH when a conversion is in progress and goes LOW when the conversion is
completed.
VCC
7
P
+12 V/+15 V Analog Supply.
VEE
11
P
–12 V/–15 V Analog Supply.
VLOGIC
1
P
+5 V Logic Supply.
10 VIN
13
AI
10 V Span Input, 0 V to +10 V unipolar mode or –5 V to +5 V bipolar mode. When using the
AD1674 in the 20 V Span 10 VIN should not be connected.
20 VIN
14
AI
20 V Span Input, 0 V to +20 V unipolar mode or –10 V to +10 V bipolar mode. When using
the AD1674 in the 10 V Span 20 VIN should not be connected.
12/8
2
DI
The 12/8 pin determines whether the digital output data is to be organized as two 8-bit words
(12/8 LOW) or a single 12-bit word (12/8 HIGH).
TYPE:
AI
= Analog Input
AO = Analog Output
DI = Digital Input
DO = Digital Output
P
= Power
FUNCTIONAL BLOCK DIAGRAM
REF OUT
SHA
COMP
20k
10k
5k
2.5k
5k
12
AD1674
AGND
BIP OFF
REF IN
20V
IN
10V
IN
IDAC
12
CONTROL
CE
12/8
CS
R/C
A
0
5k
10k
SAR
CLOCK
10V
REF
REGISTERS
/
3-STATE
OUTPUT
BUFFERS
DAC
STS
DB11 (MSB)
DB0 (LSB)
PIN CONFIGURATION
TOP VIEW
(Not to Scale)
AD1674
18
28
27
24
23
22
26
25
21
20
19
17
16
15
13
1
2
5
6
7
3
4
8
9
10
12
14
VLOGIC
CE
VCC
A0
REF OUT
AGND
REF IN
VEE
BIP OFF
10VIN
20VIN
CS
12/8
R/C
STS
DB11(MSB)
DB8
DB7
DB6
DB10
DB9
DB5
DB4
DB3
DB2
DB1
DB0(LSB)
DGND
11
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