參數(shù)資料
型號(hào): AD1819BJST
廠商: ANALOG DEVICES INC
元件分類: 消費(fèi)家電
英文描述: AC’97 SoundPort Codec
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝: LQFP-48
文件頁(yè)數(shù): 16/28頁(yè)
文件大小: 245K
代理商: AD1819BJST
AD1819B
–16–
REV. 0
MIX
Mono Output Select.
0 = Mix.
1 = Mic.
Phat Stereo Enhancement.
0 = Phat Stereo is off.
1 = Phat Stereo is on.
PCM Output Path. The POP bit controls the optional PCM out 3D bypass path (the pre- and post-
3D PCM outpaths are mutually exclusive).
0 = Pre-3D.
1 = Post-3D.
The register should be read before writing to generate a mask for only the bit(s) that need to be changed. The
default value is 0000h.
3D
POP
3D Control (Index 22h)
g
m
u
e
R
N
e
m
a
N
5
1
D
4
1
D
3
1
D
2
1
D
1
1
D
0
1
D
9
D
8
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
D
t
u
a
f
D
*
h
2
2
l
r
n
o
C
D
3
X
X
X
X
X
X
X
X
X
X
X
X
3
P
D
2
P
D
1
P
D
0
P
D
h
0
0
0
0
DP [2:0]
Depth Control. Sets 3D “Depth” Phat Stereo enhancement according to table below.
DP3 . . . DP0
0
1
14
15
Depth
0%
6.67%
93.33%
100%
Power-Down Control/Status (Index 26h)
g
m
u
e
R
N
e
m
a
N
5
1
D
4
1
D
3
1
D
2
1
D
1
1
D
0
1
D
9
D
8
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
D
t
u
a
f
D
h
6
2
t
S
n
C
n
w
o
D
-
w
o
P
X
X
5
R
P
4
R
P
3
R
P
2
R
P
1
R
P
0
R
P
X
X
X
X
F
E
R
L
N
A
C
A
D
C
D
A
h
0
0
0
0
Ready Bits: The ready bits are read only, writing to REF, ANL, DAC, ADC will have no effect. These bits indi-
cate the status for the AD1819B subsections. If the bit is a one then that subsection is “ready.” Ready is defined as
the subsection able to perform in its nominal state.
ADC section ready to transmit data.
DAC section ready to accept data.
Analog gainuators, attenuators, and mixers ready.
Voltage References, V
REF
and V
REFOUT
up to nominal level.
Power-Down Bits. Bits 0 and 1 are to be used individually rather than in combination with each other. The last bit
PR3 can be used in combination with PR2 or by itself.
ADC
DAC
ANL
REF
PR [5:0]
Power-Down State
ADCs and Input Mux Power-Down
DACs Power-Down
Analog Mixer Power-Down (V
REF
and V
REFOUT
On)
Analog Mixer Power-Down (V
REF
and V
REFOUT
Off)
AC-Link Interface Power-Down
Internal Clocks Disabled
ADC and DAC Power-Down
V
REF
Standby Mode
Total Power-Down
Set Bits
PR0
PR1
PR1, PR2
PR0, PR1, PR3
PR4
PR0, PR1, PR4, PR5
PR0, PR1
PR0, PR1, PR2, PR4, PR5
PR0, PR1, PR2, PR3, PR4, PR5
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