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參數(shù)資料
| 型號(hào)： | AD1851RZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC AUDIO FASTSET 16B 16SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時(shí)間： | 1.5µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 雙 ± |
| 工作溫度： | -25°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC W |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 輸出數(shù)目和類型： | 2 電流，雙極；2 電壓，雙極 |
| 采樣率（每秒）： | 12.5M |
| 其它名稱： | AD1851RZ-REEL7DKR |
AD1851/AD1861
REV. A
–6–
Analog Circuit Considerations
GROUNDING RECOMMENDATIONS
The AD1851/AD1861 has two ground pins, designated Analog
and Digital ground. The analog ground pin is the “high quality”
ground reference point for the device. The analog ground pin
should be connected to the analog common point in the system.
The output load should also be connected to that same point.
The digital ground pin returns ground current from the digital
logic portions of the AD1851/AD1861 circuitry. This pin
should be connected to the digital common point in the system.
As illustrated in Figure 2, the analog and digital grounds should
be connected together at one point in the system.
DGND
AGND
5V
+
AD1851/AD1861
5V
–
ANALOG
GROUND
DIGITAL
GROUND
3
16
1
2
12
+5V
+VL
+VS
–VS
Figure 2. Recommended Circuit Schematic
POWER SUPPLIES AND DECOUPLING
The AD1851/AD1861 has three power supply input pins. The
±V
S supplies provide the supply voltages to operate the linear
portions of the DAC including the voltage reference, output am-
plifier and control amplifier. The
±V
S supplies are designed to
operate at
±5 V.
The +VL supply operates the digital portions of the chip includ-
ing the input shift register and the input latching circuitry. The
+VL supply is designed to operate at +5 V.
Decoupling capacitors should be used on all power supply pins.
Furthermore, good engineering practice suggests that these ca-
pacitors be placed as close as possible to the package pins as
well as to the common points. The logic supply, +VL, should be
decoupled to digital common, while the analog supplies,
±V
S,
should be decoupled to analog common.
The use of three separate power supplies will reduce feedthrough
from the digital portion of the system to the linear portion of the
system, thus contributing to improved performance.
However, three separate voltage supplies are not necessary for
good circuit performance. For example, Figure 3 illustrates a
system where only a single positive and a single negative supply
are available.
In this example, the positive logic and positive analog supplies
must both be connected to +5 V, while the negative analog sup-
ply will be connected to –5 V. Performance would benefit from
a measure of isolation between the supplies introduced by using
simple low pass filters in the individual power supply leads.
+VL
DGND
AGND
AD1851/AD1861
ANALOG
GROUND
DIGITAL
GROUND
3
16
1
2
12
+VS
–VS
–5V
+5V
Figure 3. Alternate Recommended Schematic
As with most linear circuits, changes in the power supplies will
affect the output of the DAC. Analog Devices recommends that
well regulated power supplies with less than 1% ripple be incor-
porated into the design of any system using the AD1851/AD1861.
OPTIONAL MSB ADJUSTMENT
Use of an optional adjustment circuit allows residual differential
linearity error around midscale to be eliminated. This error is
especially important when low amplitude signals are being re-
produced. In those cases, as the signal amplitude decreases, the
ratio of the midscale differential linearity error to the signal am-
plitude increases, thereby increasing THD.
Therefore, for best performance at low output levels, the op-
tional MSB adjust circuitry shown in Figure 4 may be used to
improve performance. The adjustment should be made with a
small signal input (–20 dB or –60 dB).
15
14
1
TRIM
470k
100k
200k
MSB
ADJUST
–VS
Figure 4. Optional THD Adjust Circuit
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