參數(shù)資料
型號: AD215AY
廠商: Analog Devices Inc
文件頁數(shù): 10/12頁
文件大小: 0K
描述: IC AMP ISOL LDIST 5MA 44SIP
標準包裝: 1
放大器類型: 隔離
電路數(shù): 1
轉(zhuǎn)換速率: 6 V/µs
-3db帶寬: 120kHz
電流 - 輸入偏壓: 300pA
電壓 - 輸入偏移: 400µV
電流 - 電源: 40mA
電流 - 輸出 / 通道: 5mA
電壓 - 電源,單路/雙路(±): ±14.25 V ~ 17 V
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 44-SIP,12 引線,偏移引線
供應(yīng)商設(shè)備封裝: 12-SIP
包裝: 管件
AD215
REV. 0
–7–
POWERING THE AD215
The AD215 is powered by a bipolar
±15 V dc power supply
connected as shown in Figure 11. External bypass capacitors
should be provided in bused applications. Note that a small
signal-related current (50 mA/VOUT) will flow out of the OUT
LO pin (Pin 37). Therefore, the OUT LO terminals should be
bused together and referenced at a single “Analog Star Ground”
to the
±15 V dc supply common as illustrated Figure 11.
AD215N
AD2151
OUT LON
NTH CHANNEL
1ST CHANNEL
ANALOG STAR GROUND
OUT LO1
SIG COM
+VIN
PWR RTN
–VIN
+15V dc
COM
–15V dc
2.2F
37
42
43
44
42
44
43
2.2F
37
Figure 11. Typical Power Supply Connections
Power Supply Voltage Considerations
The rated performance of the AD215 remains unaffected for
power supply voltages in the
±14.5 V dc to ±16.5 V dc range.
Voltages below
±14.25 V dc may cause the AD215 to cease op-
erating properly.
Note: Power supply voltages greater than
±17.5 V dc may damage
the internal components and consequently should not be used.
USING THE AD215
Unity Gain Input Configuration
The basic unity gain configuration for input signals of up to
±10 V is shown in Figure 12.
RIN = 2k
VSIGNAL
IN+
IN–
FB
IN COM
OUT HI
OUT LO
PWR
RTN
COM
TRIM
OUTPUT FILTER,
BUFFER AND
TRIM CIRCUITRY
1
3
4
2
38
36
37
43
AD215
Figure 12. Basic Unity Gain
Noninverting Configuration for Gain Greater Than Unity
Figure 13 shows how to achieve a gain greater than one while
continuing to preserve a very high input impedance. A recom-
mended PC board layout for multichannel applications is shown
in Figure 20b.
RIN = 2k
VSIGNAL
IN+
IN–
FB
IN COM
OUT HI
OUT LO
PWR
RTN
COM
TRIM
OUTPUT
FILTER,
BUFFER
AND
TRIM
CIRCUITRY
1
3
4
2
38
36
37
43
AD215
CF
47pF
RF
RG
Figure 13. Noninverting Input Configuration for
Gain > 1 V/V
In this circuit, the gain equation is as follows:
VO = (1 + RF/RG) × VSIG
where:
VO
= Output Voltage (V)
VSIG = Input Signal Voltage (V)
RF
= Feedback Resistor Value (
)
RG
= Gain Resistor Value (
)
The values for resistors RF and RG are subject to the following
constraints:
The total impedance of the gain network should be less than
10 k
.
The current drawn in RF is less than 1 mA at
±10 V. Note that
for each mA drawn by the feedback resistor, the isolated
power supply drive capability decreases by 1 mA.
Amplifier gain is set by the feedback (RF) and gain resistor
(RG).
It is recommended that RF is bypassed with a 47 pF capacitor as
shown.
Note: The 2 k
input resistor (R
IN) in series with the input
signal source and the IN+ terminal in Figures 12 and 13 is rec-
ommended to limit the current at the input terminals of the to
5.0 mA when the AD215 is not powered.
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