參數(shù)資料
型號(hào): AD22050
廠商: Analog Devices, Inc.
英文描述: Single-Supply Sensor Interface Amplifier
中文描述: 單電源傳感器接口放大器
文件頁數(shù): 2/8頁
文件大?。?/td> 148K
代理商: AD22050
ORDERING GUIDE
Model
Temperature Range
–40
°
C to +125
°
C
–40
°
C to +125
°
C
–40
°
C to +125
°
C
Package Descriptions
Package Options
AD22050N
AD22050R
AD22050R-Reel
Plastic DIP
Plastic SOIC
Tape and Reel
N-8
SO-8
SO-8*
*Quantities must be in increments of 2,500 pieces each.
AD22050–SPECIFICATIONS
REV. C
–2–
(T
A
= +25
8
C, V
S
= +5 V, and V
CM
= 0, R
L
= 10 k
V
unless otherwise noted)
Parameter
Test Conditions
Min
Typ
Max
Units
INPUTS (Pins 1 and 8)
+CMR
–CMR
CMRR
LF
CMRR
HF
R
INCM
R
MATCH
R
INDIFF
PREAMPLIFIER
G
CL
V
O
R
O
OUTPUT BUFFER
G
CL
V
O
R
O
OVERALL SYSTEM
G
Positive Common-Mode Range
Negative Common-Mode Range
Common-Mode Rejection Ratio
Common-Mode Rejection Ratio
Common-Mode Input Resistances
Matching of Resistances
Differential Input Resistance
T
A
= T
MIN
to T
MAX
T
A
= T
MIN
to +85
°
C
f
10 Hz
f = 10 kHz
Pin 1 or Pin 8 to Pin 2
+24
V
V
dB
dB
k
%
k
–1.0
80
60
180
90
75
240
±
0.5
400
300
Pin 1 to Pin 8
280
Closed-Loop Gain
1
Output Voltage Range (Pin 3)
Output Resistance
2
9.7
+0.01
97
10.0
10.3
+4.8
103
V
k
100
Closed-Loop Gain
1
Output Voltage Range
3
Output Resistance (Pin 5)
R
LOAD
10 k
T
A
= T
MIN
to T
MAX
V
O
0.1 V dc, I
O
< 1 mA
1.94
+0.02
2.0
2.06
+4.8
V
2.0
Gain
1
Over Temperature
Input Offset Voltage
4
Over Temperature
Midscale Offset (Pin 7) Scaling
Input Resistance
Short-Circuit Output Current
–3 dB Bandwidth
Slew Rate
Noise Spectral Density
3
V
O
0.1 V dc
T
A
= T
MIN
to T
MAX
19.9
19.8
–1
–3
0.49
2.5
7
20.0
20.1
20.2
1
3
0.51
V
OS
0.03
mV
mV
V/V
k
mA
kHz
V/
μ
s
μ
V/
Hz
T
A
= T
MIN
to T
MAX
OFS
0.50
3.0
11
30
0.2
0.2
Pin 7 to Pin 2
T
A
= T
MIN
to T
MAX
V
O
= +1 V dc
I
OSC
BW
–3 dB
SR
N
SD
POWER SUPPLY
V
S
I
S
TEMPERATURE RANGE
T
OP
25
f = 100 Hz to 10 kHz
Operating Range
Quiescent Supply Current
5
T
A
= T
MIN
to T
MAX
T
A
= +25
°
C, V
S
= +5 V
3.0
5
200
36
500
V
μ
A
Operating Temperature Range
–40
+125
°
C
NOTES
1
Specified for default mode, i.e., with no external components. The overall gain is trimmed to 0.5%, while the individual gains of A1 and A2 may be subject to a
maximum
±
3% tolerance. Note that the actual gain in a particular application can be modified by the use of external resistor networks.
2
The actual output resistance of A1 is only a few ohms, but access to this output, via Pin 3, is always through the resistor R12 (see Figure 16) which is 100 k
,
trimmed to
±
3%.
3
For V
20 V. For V
> 20 V, V
OL
1 mV/V
×
V
CM
.
4
Referred to the input (Pins 1 and 8).
5
With V
DM
= 0 V
.
Differential mode signals are referred to as V
DM
, while V
CM
refers to common-mode voltages—see the section Product Description and Figure 3.
All min and max specifications are guaranteed, although only those marked in
boldface
are tested on all production units at final test.
Specifications subject to change without notice.
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