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參數(shù)資料
| 型號(hào)： | AD420ARZ-32-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 4/16頁 |
| 文件大小： | 0K |
| 描述： | IC DAC SERIAL INPUT 16BIT 24SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 設(shè)置時(shí)間： | 2.5µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 176mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SOIC W |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電流，雙極 |
| 采樣率（每秒）： | 400 |
AD420
Rev. H | Page 12 of 16
MICROPROCESSOR INTERFACE
AD420-TO-MC68HC11 (SPI BUS) INTERFACE
The AD420 interface to the Motorola serial peripheral interface
(SPI) is shown in Figure 11. The MOSI, SCK, and SS pins of the
HC11 are respectively connected to the DATA IN, CLOCK, and
LATCH pins of the AD420. The majority of the interfacing
issues are done in the software initialization. A typical routine,
such as the one shown below, begins by initializing the state of
the various SPI data and control registers.
INIT
LDAA
#$2F
; SS = 1; SCK = 0;
MOSI = 1
STAA
PORTD
;SEND TO SPI OUTPUTS
LDAA
#$38
; SS, SCK, MOSI =
OUTPUTS
STAA
DDRD
;SEND DATA DIRECTION
INFO
LDAA
#$50
;DABL INTRPTS, SPI
IS MASTER & ON
STAA
SPCR
;CPOL = 0, CPHA = 0,
1MHZ BAUDRATE
NEXTPT
LDAA
MSBY
;LOAD ACCUM W/UPPER
8 BITS
BSR
SENDAT
;JUMP TO DAC OUTPUT
ROUTINE
JMP
NEXTPT
;INFINITE LOOP
SENDAT
LDY
#$1000
;POINT AT ON-CHIP
REGISTERS
BCLR
$08,Y,$20
;DRIVE SS (LATCH)
LOW
STAA
SPDR
;SEND MS-BYTE TO SPI
DATA REG
WAIT1
LDAA
SPSR
;CHECK STATUS OF
SPIE
BPL
WAIT1
;POLL FOR END OF X-
MISSION
LDAA
LSBY
;GET LOW 8 BITS FROM
MEMORY
STAA
SPDR
;SEND LS-BYTE TO SPI
DATA REG
WAIT2
LDAA
SPSR
;CHECK STATUS OF
SPIE
BPL
WAIT2;
;POLL FOR END OF X-
MISSION
BSET
$08,Y,$20
;DRIVE SS HIGH TO
LATCH DATA
RTS
The SPI data port is configured to process data in 8-bit bytes.
The most significant data byte (MSBY) is retrieved from
memory and processed by the SENDAT routine. The SS pin is
driven low by indexing into the PORTD data register and clear
Bit 5. The MSBY is then sent to the SPI data register where it is
automatically transferred to the AD420 internal shift resister.
The HC11 generates the requisite eight clock pulses with data
valid on the rising edges. After the MSBY is transmitted, the
least significant byte (LSBY) is loaded from memory and
transmitted in a similar fashion. To complete the transfer, the
LATCH pin is driven high when loading the complete 16-bit
word into the AD420.
00
494
-0
1
DATA IN
CLOCK
LATCH
MOSI
SCK
SS
68HC11
AD420
Figure 11. AD420-to-68HC11 (SPI) Interface
AD420 TO MICROWIRE INTERFACE
The flexible serial interface of the AD420 is also compatible
with the National Semiconductor MICROWIRE interface. The
MICROWIRE interface is used in microcontrollers such as the
COP400 and COP800 series of processors. A generic interface
to use the MICROWIRE interface is shown in Figure 12. The
G1, SK, and SO pins of the MICROWIRE interface are
respectively connected to the LATCH, CLOCK, and DATA IN
pins of the AD420.
00
494
-01
2
DATA IN
CLOCK
LATCH
SO
SK
G1
MICROWIRE
AD420
Figure 12. AD420-to-MICROWIRE Interface
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