參數(shù)資料
型號: AD5044BRUZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 17/28頁
文件大?。?/td> 0K
描述: IC DAC QUAD 14BIT SPI 16TSSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1,000
系列: nanoDAC™
設(shè)置時間: 5.8µs
位數(shù): 14
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 單電源
功率耗散(最大): 30mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 4 電壓,雙極
采樣率(每秒): 125k
AD5024/AD5044/AD5064
Data Sheet
Rev. F | Page 24 of 28
POWER SUPPLY BYPASSING AND GROUNDING
When accuracy is important in a circuit, it is helpful to carefully
consider the power supply and ground return layout on the board.
The printed circuit board (PCB) containing the AD5024/AD5044/
AD5064/AD5064-1 should have separate analog and digital
sections. If the AD5024/AD5044/AD5064/AD5064-1 are in a
system where other devices require an AGND-to-DGND
connection, the connection should be made at one point only.
This ground point should be as close as possible to the
AD5024/AD5044/AD5064/AD5064-1.
The power supply to the AD5024/AD5044/AD5064/AD5064-1
should be bypassed with 10 F and 0.1 F capacitors. The capaci-
tors should be as physically close as possible to the device, with
the 0.1 F capacitor ideally right up against the device. The 10 F
capacitors are the tantalum bead type. It is important that the
0.1 F capacitor have low effective series resistance (ESR) and
low effective series inductance (ESI), such as is typical of common
ceramic types of capacitors. This 0.1 F capacitor provides a low
impedance path to ground for high frequencies caused by
transient currents due to internal logic switching.
The power supply line should have as large a trace as possible to
provide a low impedance path and reduce glitch effects on the
supply line. Clocks and other fast switching digital signals should
be shielded from other parts of the board by digital ground. Avoid
crossover of digital and analog signals, if possible. When traces
cross on opposite sides of the board, ensure that they run at right
angles to each other to reduce feedthrough effects through the
board. The best board layout technique is the microstrip tech-
nique, where the component side of the board is dedicated to the
ground plane only and the signal traces are placed on the solder
side. However, this is not always possible with a 2-layer board.
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