參數(shù)資料
型號: AD5114BCPZ10-500R7
廠商: Analog Devices Inc
文件頁數(shù): 13/28頁
文件大?。?/td> 0K
描述: IC DGTL POT 32POS 10K 8LFCSP
標(biāo)準(zhǔn)包裝: 1
接片: 32
電阻(歐姆): 10k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 35 ppm/°C
存儲器類型: 非易失
接口: I²C,2 線串口
電源電壓: 1.8 V ~ 5 V,2.3 V ~ 5.5V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-UFDFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 8-LFCSP-UD(2x2)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: AD5114BCPZ10-500R7DKR
AD5110/AD5112/AD5114
Data Sheet
Rev. B | Page 20 of 28
INPUT SHIFT REGISTER
For the AD5110/AD5112/AD5114, the input shift register is
16 bits wide (see Figure 2). The 16-bit word consists of five
unused bits (should be set to zero), followed by three control
bits, and eight RDAC data bits. If the RDAC register is read from
or written to in the AD5112, Bit DB0 is a don’t care. The RDAC
register is read from or written to in the AD5114, Bit DB0 and
DB1 are don’t cares. Data is loaded MSB first (Bit DB15).
The three control bits determine the function of the software
command (Table 10). Figure 3 shows a timing diagram of a
typical AD5110/AD5112/AD5114 write sequence.
The command bits (Cx) control the operation of the digital
potentiometer and the internal EEPROM. The data bits (Dx)
are the values that are loaded into the decoded register.
Table 10. Command Operation Truth Table
Command
Number
Command
Data1
DB10
DB8
DB7
DB0
C2
C1
C0
D7
D6
D5
D4
D3
D2
D1
D0
Operation
0
X
No operation
1
0
1
X
Write contents of RDAC register to EEPROM
2
0
1
0
7
MSB
6
5
4
3
2
LSB
Write contents of serial register data to RDAC
1
0
Top scale
1
Bottom scale
3
0
1
X
A0
Software shutdown
0: shutdown off
1: shutdown on
4
1
0
X
Software reset: refresh RDAC register with EEPROM
5
1
0
1
X
Read contents of RDAC register
6
1
0
X
A1
A0
Read contents of EEPROM
A1
A0
Data
0
Wiper position saved
0
1
Resistor tolerance
1 X is don’t care.
2 In the AD5114, this bit is a don’t care.
3 In the AD5112, this bit is a don’t care.
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