參數(shù)資料
型號: AD5171BRJZ5-R2
廠商: Analog Devices Inc
文件頁數(shù): 5/24頁
文件大?。?/td> 0K
描述: IC DGTL POT OTP 5K 12C SOT23-8
標準包裝: 1
接片: 64
電阻(歐姆): 5k
電路數(shù): 1
溫度系數(shù): 標準值 35 ppm/°C
存儲器類型: 非易失
接口: I²C(設備位址)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: SOT-23-8
供應商設備封裝: SOT-23-8
包裝: 標準包裝
配用: AD5171EVAL-ND - BOARD EVAL FOR AD5171
其它名稱: AD5171BRJZ5-R2DKR
AD5171
Rev. D | Page 13 of 24
VARIABLE RESISTANCE AND VOLTAGE FOR
RHEOSTAT MODE
If only the W-to-B or W-to-A terminals are used as variable
resistors, the unused terminal can be opened or shorted with
Terminal W. This operation is called rheostat mode (see Figure 26).
A
W
B
A
W
B
A
W
B
0
34
37
-0
50
Figure 26. Rheostat Mode Configuration
The nominal resistance (RAB) of the RDAC has 64 contact points
accessed by the wiper terminal, plus Terminal B contact if RWB is
considered. The 6-bit data in the RDAC latch is decoded to
select one of the 64 settings. Assuming that a 10 kΩ part is used,
the first connection of the wiper starts at Terminal B for Data 0x00.
Such a connection yields a minimum of 60 Ω resistance between
Terminal W and Terminal B due to the 60 Ω wiper contact
resistance. The second connection is the first tap point, which
corresponds to 219 Ω (RWB = 1 × RAB/63 + RW) for Data 0x01,
and so on. Each LSB data value increase moves the wiper up
the resistor ladder until the last tap point is reached at 10,060 Ω
(63 × RAB/63 + RW). Figure 27 shows a simplified diagram of the
equivalent RDAC circuit. The general equation determining RWB is
W
AB
WB
R
D
R
+
×
=
63
)
(
(1)
where:
D is the decimal equivalent of the 6-bit binary code.
RAB is the end-to-end resistance.
RW is the wiper resistance contributed by the on-resistance of
the internal switch.
Table 6. RWB vs. Codes: RAB = 10 kΩ; Terminal A Open
D (Dec)
RWB (Ω)
Output State
63
10060
Full-scale (RAB + RW)
32
5139
Midscale
1
219
1 LSB
0
60
Zero-scale (wiper contact resistance)
Because a finite wiper resistance of 60 Ω is present in the zero-
scale condition, care should be taken to limit the current flow
between Terminal W and Terminal B in this state to a maximum
pulse current 20 mA. Otherwise, degradation or possible
destruction of the internal switch contact can occur.
Similar to the mechanical potentiometer, the resistance of the
RDAC between the wiper (Terminal W) and Terminal A also
produces a complementary resistance, RWA. When these terminals
are used, Terminal B can be opened or shorted to Terminal W.
Setting the resistance value for RWA starts at a maximum value
of resistance and decreases as the data loaded in the latch
increases in value. The general equation for this operation is
W
AB
WA
R
D
R
+
×
=
63
)
(
(2)
Table 7. RWA vs. Codes: RAB = 10 kΩ; Terminal B Open
D (Dec)
RWA (Ω)
Output State
63
60
Full-scale
32
4980
Midscale
1
9901
1 LSB
0
10060
Zero-scale
The typical distribution of the resistance tolerance from device
to device is process-lot dependent; it is possible to have ±30%
tolerance.
RS
A
W
B
D5
D4
D3
D2
D1
D0
RDAC
LATCH
AND
DECODER
03
43
7-
0
26
Figure 27. AD5171 Equivalent RDAC Circuit
VARIABLE RESISTANCE AND VOLTAGE FOR
POTENTIOMETER MODE
If all three terminals are used, the operation is called the
potentiometer mode. The most common configuration is the
voltage divider operation (see Figure 28).
A
W
B
VI
VO
0
34
37
-0
51
Figure 28. Potentiometer Mode Configuration
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