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參數(shù)資料
| 型號(hào)： | AD5172BRM100-RL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字電位計(jì) |
| 英文描述： | Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers |
| 中文描述： | DUAL 100K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO10 |
| 封裝： | 3 X 4.90 MM, MO-187BA, MSOP-10 |
| 文件頁數(shù)： | 12/24頁 |
| 文件大?。?/td> | 948K |
| 代理商： | AD5172BRM100-RL7 |
AD5172/AD5173
OPERATION
Rev. A | Page 12 of 24
SDA
SCL
A
W
B
FUSES
EN
DAC
REG.
I
2
C INTERFACE
COMPARATOR
ONE-TIME
PROGRAM/TEST
CONTROL BLOCK
MUX
DECODER
FUSE
REG.
0
Figure 35. Detailed Functional Block Diagram
The AD5172/AD5173 is a 256-position, digitally controlled
variable resistor (VR) that employs fuse link technology to
achieve memory retention of resistance setting.
An internal power-on preset places the wiper at midscale
during power-on. If the OTP function has been activated, the
device powers up at the user-defined permanent setting.
ONE-TIME PROGRAMMING (OTP)
Prior to OTP activation, the AD5172/AD5173 presets to mid-
scale during initial power-on. After the wiper is set at the
desired position, the resistance can be permanently set by
programming the T bit high along with the proper coding (see
Table 5 and Table 6). Note that fuse link technology requires 6 V
to blow the internal fuses to achieve a given setting. The user is
allowed only one attempt at blowing the fuses. Once program-
ming is completed, the power supply voltage must be reduced to
the normal operating range of 2.7 V to 5.5 V.
The device control circuit has two validation bits, E1 and E0,
that can be read back to check the programming status (see
Table 7). Users should always read back the validation bits to
ensure that the fuses are properly blown. After the fuses have
been blown, all fuse latches are enabled upon subsequent
power-on; therefore, the output corresponds to the stored
setting. Figure 35 shows a detailed functional block diagram.
PROGRAMMING THE VARIABLE RESISTOR AND
VOLTAGE
Rheostat Operation
The nominal resistance of the RDAC between terminals A and
B is available in 2.5 k, 10 k, 50 k, and 100 k. The nominal
resistance (R
AB
) of the VR has 256 contact points accessed by
the wiper terminal, plus the B terminal contact. The 8-bit data
in the RDAC latch is decoded to select one of the 256 possible
settings.
A
W
B
A
W
B
A
W
B
0
Figure 36. Rheostat Mode Configuration
Assuming a 10 k part is used, the wiper’s first connection
starts at the B terminal for data 0x00. Because there is a 50
wiper contact resistance, such a connection yields a minimum
of 100 (2 × 50 ) resistance between terminals W and B. The
second connection is the first tap point, which corresponds to
139 (R
WB
= R
AB
/256 + 2 × R
W
= 39 + 2 × 50 ) for data
0x01. The third connection is the next tap point, representing
178 (2 × 39 + 2 × 50 ) for data 0x02, and so on. Each LSB
data value increase moves the wiper up the resistor ladder until
the last tap point is reached at 10,100 (R
AB
+ 2 × R
W
).
D4
D3
D2
D1
D0
D7
D5
RDAC
LATCH
AND
DECODER
R
S
R
S
R
S
R
S
A
W
B
0
Figure 37. AD5172/AD5173 Equivalent RDAC Circuit
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