參數(shù)資料
型號: AD5173BRM100-RL7
廠商: ANALOG DEVICES INC
元件分類: 數(shù)字電位計
英文描述: Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers
中文描述: DUAL 100K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO10
封裝: 3 X 4.90 MM, MO-187BA, MSOP-10
文件頁數(shù): 13/24頁
文件大?。?/td> 948K
代理商: AD5173BRM100-RL7
AD5172/AD5173
The general equation that determines the digitally programmed
output resistance between W and B is
Rev. A | Page 13 of 24
W
AB
WB
R
R
D
D
R
×
+
×
=
2
128
)
(
(1)
where
D
is the decimal equivalent of the binary code loaded in
the 8-bit RDAC register,
R
AB
is the end-to-end resistance, and
R
W
is the wiper resistance contributed by the on resistance of
the internal switch.
In summary, if R
AB
= 10 k and the A terminal is open-
circuited, the output resistance R
WB
is set for the RDAC latch
codes, as shown in Table 5.
Table 5. Codes and Corresponding RWB Resistance
D (Dec.)
R
WB
()
Output State
255
9,961
Full-Scale (R
AB
– 1 LSB + R
W
)
128
5,060
Midscale
1
139
1 LSB
0
100
Zero-Scale (Wiper Contact Resistance)
Note that in the zero-scale condition, a finite wiper resistance of
100 is present. Care should be taken to limit the current flow
between W and B in this state to a maximum pulse current of
no more than 20 mA. Otherwise, degradation or possible
destruction of the internal switch contact can occur.
Similar to the mechanical potentiometer, the resistance of the
RDAC between the wiper W and terminal A also produces a
digitally controlled complementary resistance,
R
WA
. When these
terminals are used, the B terminal can be opened. Setting the
resistance value for
R
WA
starts at a maximum value of resistance
and decreases as the data loaded in the latch increases in value.
The general equation for this operation is
W
AB
WA
R
R
D
D
R
×
+
×
=
2
128
256
)
(
(2)
For
R
AB
= 10 k and the B terminal open-circuited, the
following output resistance
R
WA
is set for the RDAC latch codes,
as shown in Table 6.
Table 6. Codes and Corresponding R
WA
Resistance
D (Dec.)
R
WA
()
255
139
128
5,060
1
9,961
0
10,060
Output State
Full-Scale
Midscale
1 LSB
Zero-Scale
Typical device-to-device matching is process lot dependent and
may vary by up to ±30%. Because the resistance element is pro-
cessed using thin film technology, the change in R
AB
with
temperature has a very low 35 ppm/°C temperature coefficient.
PROGRAMMING THE POTENTIOMETER DIVIDER
Voltage Output Operation
The digital potentiometer easily generates a voltage divider at
wiper-to-B and wiper-to-A proportional to the input voltage at
A-to-B. Unlike the polarity of V
DD
to GND, which must be posi-
tive, voltage across A-B, W-A, and W-B can be at either polarity.
A
V
I
W
B
V
O
0
Figure 38. Potentiometer Mode Configuration
If ignoring the effect of the wiper resistance for approximation,
connecting the A terminal to 5 V and the B terminal to ground
produces an output voltage at the wiper-to-B starting at 0 V up
to 1 LSB less than 5 V. Each LSB of voltage is equal to the
voltage applied across terminal AB divided by the 256 positions
of the potentiometer divider. The general equation defining the
output voltage at
V
W
with respect to ground for any valid input
voltage applied to terminals A and B is
B
A
W
V
D
V
D
256
D
V
256
256
)
(
+
=
(3)
For a more accurate calculation, which includes the effect of
wiper resistance,
V
W
can be found as
B
AB
WA
R
A
AB
WB
R
W
V
D
R
V
D
R
D
V
)
(
)
(
)
(
+
=
(4)
Operation of the digital potentiometer in the divider mode
results in a more accurate operation over temperature. Unlike
the rheostat mode, the output voltage is dependent mainly on
the ratio of the internal resistors
R
WA
and
R
WB
and not the abso-
lute values. Thus, the temperature drift reduces to 15 ppm/°C.
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