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參數(shù)資料
| 型號： | AD5232BRU50-REEL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字電位計 |
| 英文描述： | 8-Bit Dual Nonvolatile Memory Digital Potentiometer |
| 中文描述： | DUAL 50K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO16 |
| 封裝： | MO-153AB, TSSOP-16 |
| 文件頁數(shù)： | 9/20頁 |
| 文件大小： | 268K |
| 代理商： | AD5232BRU50-REEL7 |
REV. 0
AD5232
–9–
T able III. Instruction/Operation T ruth T able
Instruction Byte 1
B15
C3 C2 C1 C0 A3 A2 A1 A0
0
0
0
0
0
0
0
1
Data Byte 0
B7
D7 D6 D5 D4 D3 D2 D1 D0
X
X
X
X
X
X
X
X
Inst
No.
0
1
B8
B0
Operation
No Operation (NOP). Do nothing.
Write contents of EEMEM(A0) to
RDAC (A0) Register. T his command
leaves device in the Read Program power
state. T o return part to the idle state,
perform NOP instruction #0.
SAVE WIPER SET T ING. Write con-
tents of RDAC(ADDR) to EEMEM(A0)
Write contents of Serial Register Data
Byte 0 to EEMEM(ADDR).
Decrement 6 dB right shift contents of
RDAC(A0), stops at all “Zeros.”
Decrement All 6 dB right shift contents
of all RDAC Registers, stops at all “Zeros.”
Decrement contents of RDAC(A0) by
“One,” stops at all “Zeros.”
Decrement contents of all RDAC Regis-
ters by “One,” stops at all “Zeros.”
RESET . Load all RDACs with their cor-
responding EEMEM previously-saved
values.
Write contents of EEMEM(ADDR) to
Serial Register Data Byte 0.
Write contents of RDAC(A0) to Serial
Register Data Byte 0.
Write contents of Serial Register Data
Byte 0 to RDAC(A0).
Increment 6 dB left shift contents of
RDAC(A0), stops at all “Ones.”
Increment all 6 dB left shift contents
of all RDAC Registers, stops at all “Ones.”
Increment contents of RDAC(A0) by
“One,” stops at all “Ones.”
Increment contents of all RDAC Regis-
ters “One,” stops at all “Ones.”
X
0
X
0
X
0
X
A0
X
X
X
X
X
X
X
X
2
0
0
1
0
0
0
0
A0
X
X
X
X
X
X
X
X
3
0
0
1
1
<< AD D R >>
D7 D6 D5 D4 D3 D2 D1 D0
4
0
1
0
0
0
0
0
A0
X
X
X
X
X
X
X
X
5
0
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
6
0
1
1
0
0
0
0
A0
X
X
X
X
X
X
X
X
7
0
1
1
1
X
X
X
X
X
X
X
X
X
X
X
X
8
1
0
0
0
0
0
0
0
X
X
X
X
X
X
X
X
9
1
0
0
1
<< AD D R >>
X
X
X
X
X
X
X
X
10
1
0
1
0
0
0
0
A0
X
X
X
X
X
X
X
X
11
1
0
1
1
0
0
0
A0
D7 D6 D5 D4 D3 D2 D1 D0
12
1
1
0
0
0
0
0
A0
X
X
X
X
X
X
X
X
13
1
1
0
1
X
X
X
X
X
X
X
X
X
X
X
X
14
1
1
1
0
0
0
0
A0
X
X
X
X
X
X
X
X
15
1
1
1
1
X
X
X
X
X
X
X
X
X
X
X
X
NOT ES
1. T he SDO output shifts out the last eight bits of data clocked into the serial register for daisy-chain operation. Exception: following Instruction #9 or #10 the selected internal
register data will be present in data byte 0. Instructions following #9 and #10 must be a full 16-bit data word to completely clock out the contents of the serial register.
2. T he RDAC register is a volatile scratch pad register that is refreshed at power-on from the corresponding nonvolatile EEMEM register.
3. T he increment, decrement, and shift commands ignore the contents of the shift register Data Byte 0.
4. Execution of the Operation column noted in the table takes place when the
CS
strobe returns to logic high.
5. Execution of a NOP instruction minimizes power dissipation.
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