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| 型號(hào)： | AD5233BRU50-REEL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字電位計(jì) |
| 英文描述： | 32-Tap. Nonvolatile. Linear-Taper Digital Potentiometers in SOT23 |
| 中文描述： | QUAD 50K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 64 POSITIONS, PDSO24 |
| 封裝： | MO-153AD, TSSOP-24 |
| 文件頁數(shù)： | 12/14頁 |
| 文件大?。?/td> | 221K |
| 代理商： | AD5233BRU50-REEL7 |
PRELIMINARY TECHNICAL DATA
Nonvolatile Memory Digital Potentiometers
AD5231/AD5232/AD5233
Latched Digital Outputs
A pair of digital outputs, O1 & O2, is available on the AD5231,
and the AD5233 parts that provide a nonvolatile logic 0 or logic
1 setting. O1 & O2 are standard CMOS logic outputs shown in
figure 2A. These outputs are ideal to replace functions often
provided by DIP switches. In addition, they can be used to drive
other standard CMOS logic controlled parts that need an
occasional setting change.
REV PrF
Information contained in this Preliminary data sheet describes a product in the early definition stage. There is no guarantee that the
information contained here will become a final product in its present form. For latest information contact Walt Heinzer/Analog Devices, Santa
Clara, CA. TEL(408)382-3107; FAX (408)382-2708; walt.heinzer@analog.com
12
22 MAR '01
OUTPUTS
O1 & O2
PINS
V
DD
GND
Figure 2A. Logic Outputs O1 & O2.
Using Additional internal Nonvolatile EEMEM
The AD523x family of devices contains additional internal user
storage registers (EEMEM) for saving constants and other 8-bit
data. Table 6 provides an address map of the internal storage
registers shown in the functional block diagrams as EEMEM1,
EEMEM2, … EEMEMn, and bytes of USER EEMEM.
Table 6: EEMEM Address Map
EEMEM Contents of each device
EEMEM(ADDR)
EEMEM
Address
(ADDR)
AD5231 (16B)
AD5232
(8B)
AD5233
(8B)
0000
RDAC
RDAC1
RDAC1
0001
O1 & O2
RDAC2
RDAC2
0010
USER 1
USER 1
RDAC3
0011
USER 2
USER 2
RDAC4
0100
USER 3
USER 3
O1 & O2
0101
USER 4
USER 4
USER 1
***
***
***
***
1111
USER 14
USER 14
USER 11
NOTES:
1.
RDAC data stored in EEMEM locations are transferred to
their corresponding RDAC REGISTER at Power ON, or
when the following instructions are executed Inst#1 and
Inst#8.
2.
O1 & O2 data stored in EEMEM locations are transferred
to their corresponding DIGITAL REGISTER at Power ON,
or when the following instructions are executed Inst#1 and
Inst#8.
3.
USER data are internal nonvolatile EEMEM registers
available to store and retrieve constants using Inst#3 and
Inst#9 respectively.
4.
AD5231 EEMEM locations are 2 bytes each (16-bits) of
data, while the AD5232 & AD5233 are 1 byte each (8-bits).
Detail Programmable Potentiometer Operation
The actual structure of the RDAC is designed to emulate the
performance of a mechanical potentiometer. The RDAC
contains a string of connected resistor segments, with an array of
analog switches that act as the wiper connection to several
points along the resistor array. The number of points is the
resolution of the device. For example, the AD5232 has 256
connection points allowing it to provide better than 0.5% set-
ability resolution. Figure 3 provides an equivalent diagram of
the connections between the three terminals that make up one
channel of the RDAC. The SW
A
and SW
B
will always be ON
while one of the switches SW(0) to SW(2
N
-1) will be ON one at
a time depending upon the resistance step decoded from the
Data Bits. Note there are two 50 ohm wiper resistances, R
W
. The
resistance contributed by R
W
must be accounted for in the output
resistance. At terminals A-to-wiper, R
W
is the sum of the
resistances of SW
A
and SW
X
. Similarly, R
W
is the sum of the
resistances SW
B
and SW
X
at terminals B-to-Wiper.
A
X
R
S
R
S
R
S
W
X
B
X
RDAC
WIPER
REGISTER
&
DECODER
R
S
= R
AB
/ N
SW
A
SW
B
SW(2
N
-1)
SW(2
N
-2)
SW(0)
SW(1)
DIGITAL
CIRCUITRY
OMITTED FOR
CLARITY
Figure 3. Equivalent RDAC structure
TEST CIRCUITS
Figures X7 to X15 define the test conditions used in the product
specification's table.
Figure X7. Potentiometer Divider Nonlinearity error test circuit
(INL, DNL)
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