參數(shù)資料
型號(hào)： AD5242BRU100
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 4/20頁(yè)
文件大?。?/td> 0K
描述： IC DGTL POT 256POS 16-TSSOP
標(biāo)準(zhǔn)包裝： 96
接片： 256
電阻（歐姆）： 100k
電路數(shù)： 2
溫度系數(shù)： 標(biāo)準(zhǔn)值 30 ppm/°C
存儲(chǔ)器類型： 易失
接口： I²C（設(shè)備位址）
電源電壓： 2.7 V ~ 5.5 V，±2.3 V ~ 2.7 V
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 16-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 16-TSSOP
包裝： 管件
配用： EVAL-AD5242EBZ-ND - BOARD EVALUATION FOR AD5242
AD5241/AD5242
Rev. C | Page 12 of 20
THEORY OF OPERATION
The AD5241/AD5242 provide a single-/dual-channel, 256-
position digitally controlled variable resistor (VR) device. The
terms VR, RDAC, and programmable resistor are commonly
used interchangeably to refer to digital potentiometer.
To program the VR settings, refer to the Digital Interface section.
Both parts have an internal power-on preset that places the wiper
in midscale during power-on that simplifies the fault condition
recovery at power-up. In addition, the shutdown pin (SHDN)
of AD5241/AD5242 places the RDAC in an almost zero power
consumption state where Terminal A is open circuited and Wiper
W is connected to Terminal B, resulting in only leakage current
being consumed in the VR structure. During shutdown, the VR
latch contents are maintained when the RDAC is inactive. When
the part returns from shutdown, the stored VR setting is applied
to the RDAC.
SWSHDN
SW N
2–1
R
SW N
2–2
RDAC
LATCH
AND
DECODER
RRAB/2N
B
W
DIGITAL CIRCUITRY
OMITTED FOR CLARITY
A
SW1
SW0
R
D7
D6
D5
D4
D3
D2
D1
D0
SHDN
00
92
6-
02
2
Figure 31. Equivalent RDAC Circuit
PROGRAMMING THE VARIABLE RESISTOR
Rheostat Operation
The nominal resistance of the RDAC between Terminal A and
Terminal B is available in 10 kΩ, 100 kΩ, and 1 MΩ. The final two
or three digits of the part number determine the nominal resistance
value, for example, 10 kΩ = 10, 100 kΩ = 100, and 1 MΩ = 1 M.
The nominal resistance (RAB) of the VR has 256 contact points
accessed by the wiper terminal, plus the B terminal contact. The
8-bit data in the RDAC latch is decoded to select one of the 256
possible settings. Assume a 10 kΩ part is used; the first connection
of the wiper starts at the B terminal for Data 0x00. Because there is
a 60 Ω wiper contact resistance, such connection yields a minimum
of 60 Ω resistance between Terminal W and Terminal B. The
second connection is the first tap point that corresponds to 99 Ω
(RWB = RAB/256 + RW = 39 + 60) for Data 0x01. The third connection
is the next tap point representing 138 Ω (39 × 2 + 60) for Data 0x02,
and so on. Each LSB data value increase moves the wiper up the
resistor ladder until the last tap point is reached at 10,021 Ω
[RAB – 1 LSB + RW].
Figure 31 shows a simplified diagram of the equivalent RDAC
circuit where the last resistor string is not accessed; therefore,
there is 1 LSB less of the nominal resistance at full scale in
addition to the wiper resistance.
The general equation determining the digitally programmed
resistance between W and B is
RWB(D) =
256
D
× RAB + RW
(1)
where:
D is the decimal equivalent of the binary code between 0 and 255,
which is loaded in the 8-bit RDAC register.
RAB is the nominal end-to-end resistance.
RW is the wiper resistance contributed by the on resistance of
the internal switch.
Again, if RAB = 10 kΩ, Terminal A can be either open circuit or
tied to W. Table 6 shows the RWB resistance based on the code
set in the RDAC latch.
Table 6. RWB (D) at Selected Codes for RAB = 10 kΩ
D (DEC)
RWB (Ω)
Output State
255
10021
Full-scale (RWB – 1 LSB + RW)
128
5060
Midscale
1
99
1 LSB
0
60
Zero-scale (wiper contact resistance)
Note that in the zero-scale condition, a finite wiper resistance of
60 Ω is present. Care should be taken to limit the current flow
between W and B in this state to a maximum current of no more
than 20 mA. Otherwise, degradation or possible destruction of
the internal switch contact can occur.
Similar to the mechanical potentiometer, the resistance of the
RDAC between Wiper W and Terminal A also produces a
digitally controlled resistance, RWA. When these terminals are
used, Terminal B can be opened or tied to the wiper terminal.
The minimum RWA resistance is for Data 0xFF and increases as
the data loaded in the latch decreases in value. The general
equation for this operation is
RWA(D) =
256
256 D
× RAB + RW
(2)
For RAB = 10 kΩ, Terminal B can be either open circuit or tied
to W. Table 7 shows the RWA resistance based on the code set in
the RDAC latch.
Table 7. RWA (D) at Selected Codes for RAB = 10 kΩ
D (DEC)
RWA (Ω)
Output State
255
99
Full-scale
128
5060
Midscale
1
10021
1 LSB
0
10060
Zero-scale
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