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參數(shù)資料
| 型號(hào)： | AD5251BRU1-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 16/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DCP DUAL 1K 64POS 14TSSOP T/R |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 接片： | 64 |
| 電阻（歐姆）： | 1k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 650 ppm/°C |
| 存儲(chǔ)器類型： | 非易失 |
| 接口： | I²C（設(shè)備位址） |
| 電源電壓： | 2.7 V ~ 5.5 V，±2.25 V ~ 2.75 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-TSSOP |
| 包裝： | 帶卷 (TR) |
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Data Sheet
AD5251/AD5252
Rev. D | Page 23 of 28
LAYOUT AND POWER SUPPLY BIASING
It is always a good practice to employ a compact, minimum
lead-length layout design. The leads to the input should be as
direct as possible, with a minimum conductor length. Ground
paths should have low resistance and low inductance.
Similarly, it is also good practice to bypass the power supplies
with quality capacitors. Low equivalent series resistance (ESR)
1 μF to 10 μF tantalum or electrolytic capacitors should be
applied at the supplies to minimize any transient disturbance
and filter low frequency ripple. Figure 39 illustrates the basic
supply-bypassing configuration for the AD5251/AD5252.
VDD
VSS
GND
C3
AD5251/AD5252
C4
C1
+
C2
10
F
10
F
0.1
F
0.1
F
03823-0-039
Figure 39. Power Supply-Bypassing Configuration
The ground pin of the AD5251/AD5252 is used primarily as a
digital ground reference. To minimize the digital ground
bounce, the AD5251/AD5252 ground terminal should be joined
remotely to the common ground (see Figure 39).
DIGITAL POTENTIOMETER OPERATION
The structure of the RDAC is designed to emulate the
performance of a mechanical potentiometer. The RDAC
contains a string of resistor segments with an array of analog
switches that act as the wiper connection to the resistor array.
The number of points is the resolution of the device. For
example, the AD5251/AD5252 emulate 64/256 connection
points with 64/256 equal resistance, RS, allowing them to
provide better than 1.5%/0.4% resolution.
Figure 40 provides an equivalent diagram of the connections
between the three terminals that make up one channel of the
RDAC. Switches SWA and SWB are always on, but only one of
switches SW(0) to SW(2N – 1) can be on at a time (determined by
the setting decoded from the data bit). Because the switches are
nonideal, there is a 75 Ω wiper resistance, RW. Wiper resistance
is a function of supply voltage and temperature: Lower supply
voltages and higher temperatures result in higher wiper
resistances. Consideration of wiper resistance dynamics is
important in applications in which accurate prediction of
output resistance is required.
SWB
SW(1)
SW(0)
RS
SWA
SW(2N – 1)
AX
WX
SW(2N – 2)
RDAC
WIPER
REGISTER
AND
DECODER
RS = RAB/2N
RS
DIGITAL
CIRCUITRY
OMITTED FOR
CLARITY
03823-0-040
Figure 40. Equivalent RDAC Structure
PROGRAMMABLE RHEOSTAT OPERATION
If either the W-to-B or W-to-A terminal is used as a variable
resistor, the unused terminal can be opened or shorted with W;
such operation is called rheostat mode (see Figure 41). The
resistance tolerance can range ±20%.
A
W
B
03823-0-041
A
W
B
A
W
B
Figure 41. Rheostat Mode Configuration
The nominal resistance of the AD5251/AD5252 has 64/256
contact points accessed by the wiper terminal, plus the B terminal
contact. The 6-/8-bit data-word in the RDAC register is decoded
to select one of the 64/256 settings. The wiper’s first connection
starts at the B terminal for Data 0x00. This B terminal connection
has a wiper contact resistance, RW, of 75 Ω, regardless of the
nominal resistance. The second connection (the AD5251 10 kΩ
part) is the first tap point where RWB = 231 Ω (RWB = RAB/64 +
RW = 156 Ω + 75 Ω) for Data 0x01, and so on. Each LSB data
value increase moves the wiper up the resistor ladder until the
simplified diagram of the equivalent RDAC circuit.
The general equation that determines the digitally programmed
output resistance between W and B is
AD5251: RWB(D) = (D/64) × RAB + 75 Ω
(1)
AD5252: RWB(D) = (D/256) × RAB + 75 Ω
(2)
where:
D is the decimal equivalent of the data contained in the
RDAC latch.
RAB is the nominal end-to-end resistance.
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