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| 型號(hào)： | AD5252BRU1-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 17/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DCP DUAL 1K 256POS 14TSSOP TR |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 接片： | 256 |
| 電阻（歐姆）： | 1k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 650 ppm/°C |
| 存儲(chǔ)器類型： | 非易失 |
| 接口： | I²C（設(shè)備位址） |
| 電源電壓： | 2.7 V ~ 5.5 V，±2.25 V ~ 2.75 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-TSSOP |
| 包裝： | 帶卷 (TR) |
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AD5251/AD5252
Data Sheet
Rev. D | Page 24 of 28
R
AB
(%)
D (Code in Decimal)
03823-0-042
0
25
50
75
100
0
16
32
48
63
RWA
RWB
Figure 42. AD5251 RWA(D) and RWB(D) vs. Decimal Code
Since the digital potentiometer is not ideal, a 75 finite wiper
resistance is present that can easily be seen when the device is
programmed at zero scale. Because of the fine geometric and
interconnects employed by the device, care should be taken to
limit the current conduction between W and B to no more than
±5 mA continuous for a total resistance of 1 k or a pulse of
±20 mA to avoid degradation or possible destruction of the
device. The maximum dc current for AD5251 and AD5252 are
shown in Figure 21and Figure 22, respectively.
Similar to the mechanical potentiometer, the resistance of the
RDAC between Wiper W and Terminal A also produces a
digitally controlled complementary resistance, RWA. When these
terminals are used, the B terminal can be opened. The RWA
starts at a maximum value and decreases as the data loaded into
the latch increases in value (see Figure 42). The general
equation for this operation is
AD5251: RWA(D) = [(64 – D)/64] × RAB + 75
(3)
AD5252: RWA(D) = [(256 – D)/256] × RAB + 75
(4)
The typical distribution of RAB from channel-to-channel
matches is about ±0.15% within a given device. On the other
hand, device-to-device matching is process-lot dependent with
a ±20% tolerance.
PROGRAMMABLE POTENTIOMETER OPERATION
If all three terminals are used, the operation is called potenti-
ometer mode (see Figure 43); the most common configuration
is the voltage divider operation.
03823-0-043
A
B
W
VI
VC
Figure 43. Potentiometer Mode Configuration
If the wiper resistance is ignored, the transfer function is simply
AD5251:
B
AB
W
V
D
V
+
×
=
64
(5)
AD5252:
B
AB
W
V
D
V
+
×
=
256
(6)
A more accurate calculation that includes the wiper resistance
effect is
A
W
AB
W
AB
N
W
V
R
D
V
2
)
(
+
=
(7)
where 2N is the number of steps.
Unlike in rheostat mode operation, where the tolerance is high,
potentiometer mode operation yields an almost ratiometric
function of D/2N with a relatively small error contributed by the
RW terms. Therefore, the tolerance effect is almost cancelled.
Similarly, the ratiometric adjustment also reduces the
temperature coefficient effect to 50 ppm/°C, except at low value
codes where RW dominates.
Potentiometer mode operations include other applications, such
as op amp input, feedback-resistor networks, and other voltage-
scaling applications. The A, W, and B terminals can, in fact, be
input or output terminals, provided that |VA|, |VW|, and |VB| do
not exceed VDD to VSS.
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