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參數(shù)資料
| 型號： | AD5254EVAL |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers |
| 中文描述： | 雙路、256抽頭、非易失、I2C接口、數(shù)字電位器 |
| 文件頁數(shù)： | 12/28頁 |
| 文件大?。?/td> | 834K |
| 代理商： | AD5254EVAL |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁當前第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
AD5253/AD5254
Rev. 0 | Page 12 of 28
–60
–48
–24
–12
0
–36
–54
–30
–18
–6
–42
G
1k
10k
10
100
100k
1M
10M
FREQUENCY (Hz)
0
0xFF
0x80
0x40
0x20
0x10
0x08
0x04
0x02
0x01
0x00
Figure 15. Gain vs. Frequency vs. Code, R
AB
= 50 k, T
A
= 25°C
–60
–48
–24
–12
0
–36
–54
–30
–18
–6
–42
G
1k
10k
10
100
100k
1M
10M
FREQUENCY (Hz)
0
0xFF
0x80
0x40
0x20
0x10
0x08
0x04
0x02
0x01
0x00
Figure 16. Gain vs. Frequency vs. Code, R
AB
= 100 k, T
A
= 25°C
R
A
)
CODE (Decimal)
0
–100
–80
–60
–40
–20
0
20
40
60
80
100
0
32
64
96
128
160
192
224
256
100k
10k
50k
V
DD
= 5.5V
1k
Figure 17. R
AB
vs. Code, T
A
= 25°C
CLOCK FREQUENCY (Hz)
0
0
0.6
0.4
0.2
0.8
1.0
1.2
1
100
10
1k
10k
100k
1M
10M
V
DD
= 2.7V
T
A
= 25°C
V
DD
= 5.5V
I
D
Figure 18. Supply Current vs. Digital Input Clock Frequency
0
DIGITAL FEEDTHROUGH
CLK
VDD = 5V
V
W
MID-SCALE TRANSITION
7FH
≥
80H
Figure 19. Clock Feedthrough and Midscale Transition Glitch
0
VWB0
(0xFF
STORED
IN EEMEM)
VWB3
(0xFF
STORED
IN EEMEM)
VDD = VA0 = VA3 = 3.3V
GND = VB0 = VB3
MIDSCALE
PRESET
RESTORE RDAC0
SETTING TO 0xFF
RESTORE RDAC3
SETTING TO 0xFF
VDD
(NO DE-
COUPLING
CAPS)
MIDSCALE
PRESET
Figure 20. t
EEMEM_RESTORE
of RDAC0 and RDAC3
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