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參數(shù)資料
| 型號： | AD5258BRMZ50 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 8/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC POT DGTL I2C 50K 64P 10MSOP |
| 標準包裝： | 50 |
| 接片： | 64 |
| 電阻（歐姆）： | 50k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標準值 200 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | I²C（設備位址） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 10-MSOP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 787 (CN2011-ZH PDF) |
| 配用： | AD5258EVAL-ND - BOARD EVAL FOR AD5258 DGTL POT |
AD5258
Data Sheet
Rev. D | Page 16 of 24
I2C BYTE FORMATS
The following generic, write, read, and store/restore control
registers for the AD5258 refer to the device addresses listed in
Table 5, and following is the mode/condition reference key.
S = Start Condition
P = Stop Condition
SA = Slave Acknowledge
MA = Master Acknowledge
NA = No Acknowledge
W = Write
R = Read
X = Don’t Care
AD1 and AD0 are two-state address pins.
Table 5. Device Address Lookup
AD1 Address Pin
AD0 Address Pin
I2 C Device Address
0
0011000
1
0
0011010
0
1
1001100
1
1001110
GENERIC INTERFACE
Table 6. Generic Interface Format
S
7-Bit Device Address
(See Table 5)
R/W SA C2 C1 C0 A4 A3 A2 A1 A0 SA D7 D6 D5 D4 D3 D2 D1 D0 SA P
Slave Address Byte
Instruction Byte
Data Byte
Table 7. RDAC-to-EEPROM Interface Command Descriptions
C2
C1
C0
Command Description
0
Operation between I2C and RDAC
0
1
Operation between I2C and EEPROM
0
1
0
1
0
NOP
1
0
1
Restore EEPROM to RDAC1
1
0
Store RDAC to EEPROM
1
This command leaves the device in the EEMEM read power state, which consumes power. Issue the NOP command to return the device to its idle state.
WRITE MODES
Table 8. Writing to RDAC Register
S
7-Bit Device Address
0
SA
0 0 0 0 0 0 0 0
SA
X X
D5
D4
D3
D2
D1
D0
SA P
Slave Address Byte
Instruction Byte
Data Byte
Table 9. Writing to EEPROM Register
S
7-Bit Device Address
0
SA
0 0 1 0 0 0 0 0
SA
X
D5
D4
D3
D2
D1
D0
SA
P
Slave Address Byte
Instruction Byte
Data Byte
The wiper’s default value prior to programming the EEPROM is midscale.
Table 10. Activating/Deactivating Software Write Protect
S
7-Bit Device Address
0
SA
0
1
0
SA
0
WP
SA
P
Slave Address Byte
Instruction Byte
Data Byte
To activate the write protection mode, the WP bit in Table 10 must be logic high. To deactivate the write protection, the command must
be resent except with the WP in logic zero state.
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| AD5258BRMZ501 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Nonvolatile, I2C-Compatible 64-Position, Digital Potentiometer |
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