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參數(shù)資料
| 型號： | AD5260BRUZ50-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/24頁 |
| 文件大小： | 0K |
| 描述： | IC DGTL POT SNGL 50K 14-TSSOP |
| 標準包裝： | 1,000 |
| 接片： | 256 |
| 電阻（歐姆）： | 50k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標準值 35 ppm/°C |
| 存儲器類型： | 易失 |
| 接口： | 4 線 SPI（芯片選擇） |
| 電源電壓： | 4.5 V ~ 16.5 V，±4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-TSSOP |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | AD5260BRUZ50REEL7 |
AD5260/AD5262
Rev. A | Page 17 of 24
accessed by the wiper terminal, plus the B terminal contact. The
8-bit data in the RDAC latch is decoded to select one of the 256
possible settings. Assuming a 20 kΩ part is used, the wiper’s first
connection starts at the B terminal for data 0x00. Because there
is a 60 Ω wiper contact resistance, such a connection yields a
minimum of 60 Ω resistance between Terminal W and Terminal B.
The second connection is the first tap point corresponding to
138 Ω (RWB = RAB/256 RW = 78 Ω + 60 Ω) for Data 0x01. The third
connection is the next tap point representing 216 Ω (78 × 2 + 60)
for Data 0x02, and so on. Each LSB data value increase moves
the wiper up the resistor ladder until the last tap point is reached at
19,982 Ω (RAB 1 LSB + RW). The wiper does not directly connect
to the B terminal. See Figure 53 for a simplified diagram of the
equivalent RDAC circuit.
The general equation determining the digitally programmed
output resistance between W and B is
W
AB
WB
R
D
R
+
×
=
256
)
(
(1)
where D is the decimal equivalent of the binary code that is
loaded in the 8-bit RDAC register and RAB is the nominal end-
to-end resistance.
For example, when RAB = 20 kΩ, VB = 0 V, and the A terminal is
open circuit, the following output resistance values of RWB are
set for the RDAC latch codes shown in Table 9. The result is the
same if Terminal A is tied to W.
Table 9. RWB vs. Code
RDAC (Dec)
RWB (Ω)
Output State
256
19,982
Full scale (RAB – 1 LSB + RW)
128
10,060
Midscale
1
138
1 LSB
0
60
Zero-scale (wiper contact resistance)
Note that in the zero-scale condition, a finite wiper resistance of
60 Ω is present. Care should be taken to limit the current flow
between W and B in this state to no more than 20 mA to avoid
degradation or possible destruction of the internal switches.
Like the mechanical potentiometer the RDAC replaces, the
AD5260/AD5262 are completely symmetrical. The resistance
between Wiper W and Terminal A also produces a digitally
symmetrical programmability of the various terminal connec-
tions. When RWA is used, the B terminal can be left floating or
tied to the wiper. Setting the resistance value for RWA starts at a
maximum value of resistance and decreases as the data loaded
in the latch is increased in value. The general equation for this
operation is
W
AB
WA
R
D
R
+
×
=
256
)
(
(2)
For example, when RAB = 20 kΩ, VA = 0 V, and the B terminal is
open circuit, the following output resistance values of RWA are
set for the RDAC latch codes shown in Table 10. The result is
the same if Terminal B is tied to Terminal W.
Table 10. RWA vs. Code
RDAC (Dec)
RWA (Ω)
Output State
256
60
Full scale
128
10,060
Half scale
1
19,982
1 LSB
0
20,060
Zero scale
RWA
RWB
RAB = 20k
CODE (Decimal)
20
0
64
128
192
256
R
WA
(D),
R
WB
(D
)–
k
16
12
8
4
0
02
695
-057
Figure 54. AD5260/AD5262 Equivalent RDAC Circuit
The typical distribution of the nominal resistance RAB from
channel to channel matches within ±1%. Device-to-device
matching is process lot-dependent with the worst case of
±30% variation. However, because the resistance element
is processed in thin film technology, the change in RAB with
temperature has a low 35 ppm/°C temperature coefficient.
PROGRAMMING THE POTENTIOMETER DIVIDER
Voltage Output Operation
The digital potentiometer easily generates output voltages at
wiper-to-B and wiper-to-A to be proportional to the input
voltage at A-to-B. Ignore the effect of the wiper resistance. For
example, connecting the A terminal to 5 V and the B terminal
to ground produces an output voltage at W-to-B starting at 0 V
up to 1 LSB less than 5 V. Each LSB of voltage is equal to the
voltage applied across Terminal A and Terminal B divided by
the 256 positions of the potentiometer divider. Because the
AD5260/AD5262 operate from dual supplies, the general
equation defining the output voltage at VW with respect to
ground for any given input voltage applied to Terminal A and
Terminal B is
B
AB
W
V
D
V
+
×
=
256
)
(
(3)
Operation of the digital potentiometer in the divider mode
results in more accurate operation over temperature. Unlike the
rheostat mode, the output voltage is dependent on the ratio of
the internal resistors, RWA and RWB, and not the absolute values;
therefore, the drift reduces to 5 ppm/°C.
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