T
參數(shù)資料
型號: AD5262BRUZ50-RL7
廠商: Analog Devices Inc
文件頁數(shù): 4/24頁
文件大?。?/td> 0K
描述: IC POT DUAL 50K 256POS 16TSSOP
標(biāo)準(zhǔn)包裝: 1,000
接片: 256
電阻(歐姆): 50k
電路數(shù): 2
溫度系數(shù): 標(biāo)準(zhǔn)值 35 ppm/°C
存儲器類型: 易失
接口: 4 線 SPI(芯片選擇)
電源電壓: 4.5 V ~ 16.5 V,±4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 帶卷 (TR)
AD5260/AD5262
Rev. A | Page 12 of 24
FREQUENCY (Hz)
G
A
IN
(
d
B
)
1k
1M
–54
6
–48
–42
–36
–30
–24
–18
–12
–6
0
10k
100k
TA = 25°C
CODE = 0xFF
0x01
0x02
0x04
0x08
0x10
0x20
0x40
0x80
026
95-
028
Figure 27. Gain vs. Frequency vs. Code, RAB = 200 kΩ
FREQUENCY (Hz)
1k
1M
10k
100k
–3dB
BANDWIDTHS
VIN = 50mV rms
VDD/VSS= ±5V
f–3dB = 30kHz, R = 200k
f–3dB = 131kHz, R = 50k
f–3dB = 310kHz, R = 20k
GA
IN
(
d
B
)
–54
6
–48
–42
–36
–30
–24
–18
–12
–6
0
02
69
5-
0
29
Figure 28. 3 dB Bandwidth
FREQUENCY (Hz)
NO
RM
AL
IZ
E
D
G
AI
N
F
L
A
T
N
E
S
(
d
B)
100
100k
1k
0
0.1
0.2
0.3
–0.4
–0.3
–0.2
–0.7
–0.6
–0.5
–0.1
10k
CODE = 0x80
VDD/VSS= ±5V
TA = 25°C
R = 200k
R = 50k
R = 20k
02
695
-030
Figure 29. Normalized Gain Flatness vs. Frequency
FREQUENCY (Hz)
I LO
G
IC
(A
)
10k
10M
100k
600
300
400
500
0
100
200
1M
CODE 0xFF
CODE 0x55
VDD/VSS = ±5V
VDD/VSS = +5V/0V
02
69
5-
0
31
Figure 30. ILOGIC vs. Frequency
FREQUENCY (Hz)
PSR
R
(
d
B
)
100
1M
0
60
10k
10
1k
20
30
40
50
100k
–PSRR @ VDD = ±5V DC ± 10% p-p AC
+PSRR @ VDD = ±5V DC ± 10% p-p AC
CODE = 0x80, VA = VDD, VB = 0V
0
26
95-
03
2
Figure 31. PSRR vs. Frequency
20mV/DIV
1s/DIV
5V/DIV
02
69
5-
0
33
Figure 32. Midscale Glitch Energy, Code 0x80 to 0x7F
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