參數(shù)資料
型號(hào)： AD5282BRU50-REEL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 13/28頁(yè)
文件大?。?/td> 0K
描述： IC DGTL POT DUAL 256POS 16-TSSOP
標(biāo)準(zhǔn)包裝： 1,000
接片： 256
電阻（歐姆）： 50k
電路數(shù)： 2
溫度系數(shù)： 標(biāo)準(zhǔn)值 30 ppm/°C
存儲(chǔ)器類型： 易失
接口： I²C（設(shè)備位址）
電源電壓： 4.5 V ~ 16.5 V，±4.5 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 16-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 16-TSSOP
包裝： 帶卷 (TR)
AD5280/AD5282
Rev. C | Page 20 of
28
APPLICATIONS INFORMATION
Depending on the op amp GBP, reducing the feedback resistor
may extend the zero’s frequency far enough to overcome the
problem. A better approach is to include a compensation
capacitor C2 to cancel the effect caused by C1. Optimum
compensation occurs when R1 × C1 = R2 × C2. This is not
an option unless C2 is scaled as if R2 were at its maximum
value. Doing so may overcompensate and compromise the
performance slightly when R2 is set at low values. However, it
avoids the gain peaking, ringing, or oscillation at the worst case.
For critical applications, C2 should be found empirically to suit
the need. In general, C2 in the range of a few picofarads (pF) to
no more than a few tenths of a picofarad is usually adequate for
the compensation.
BIPOLAR DC OR AC OPERATION FROM DUAL
SUPPLIES
The AD5280/AD5282 can be operated from dual supplies
enabling control of ground-referenced ac signals or bipolar
operation. The ac signal, as high as VDD/VSS, can be applied
directly across Terminal A to Terminal B with the output taken
from Terminal W. See Figure 55 for a typical circuit connection.
AD5282
VDD
VSS
SCLK
SCL
SDA
±2.5V p-p
±5V p-p
D–80H
+5.0V
–5.0V
A1
B1
W1
GND
MOSI
GND
MICROCONTROLLER
A2
W2
B2
Similarly, there are W and A terminal capacitances connected to
the output (not shown); fortunately, their effect at this node is less
significant and the compensation can be avoided in most cases.
15 V, 8-BIT I2C DAC
02
92
9-
05
5
Figure 55. Bipolar Operation from Dual Supplies
GAIN CONTROL COMPENSATION
The digital potentiometer is commonly used in gain control
applications such as the noninverting gain amplifier shown in
B
A
W
C2
4.7pF
VO
R1 C
1
25pF
VI
47k
200k
02
92
9-
05
6
U1
Figure 56. Typical Noninverting Gain Amplifier
Notice that the RDAC B terminal parasitic capacitance is
connected to the op amp noninverting node. It introduces a 0
for the 1/βO term with 20 dB/decade (dec), whereas a typical op
amp GBP has 20 dB/dec characteristics. A large R2 and finite
C1 can cause the 0 frequency to fall well below the crossover
frequency. Thus the rate of closure becomes 40 dB/dec, and the
system has a 0° phase margin at the crossover frequency. The
output may ring or oscillate if the input is a rectangular pulse or
step function. Similarly, it is also likely to ring when switching
between two gain values because this is equivalent to a step
change at the input.
02
92
9-
0
57
AD5280
U2
AD8512
V+
V–
AD8512
VDD
RBIAS
VO
VDD
U1B
ADR512
D1
R2
R1
B
200k
U1A
Figure 57. 8-Bit I2C DAC
AD5280/AD5282 can be configured as a high voltage DAC, as
high as 15 V. The output is
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2
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