參數(shù)資料
型號: AD5318ARUZ
廠商: Analog Devices Inc
文件頁數(shù): 24/28頁
文件大?。?/td> 0K
描述: IC DAC 10BIT OCTAL W/BUF 16TSSOP
產(chǎn)品培訓模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 96
設置時間: 6µs
位數(shù): 10
數(shù)據(jù)接口: 串行
轉換器數(shù)目: 8
電壓電源: 單電源
功率耗散(最大): 4.5mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 16-TSSOP
包裝: 管件
輸出數(shù)目和類型: 8 電壓,單極;8 電壓,雙極
采樣率(每秒): 167k
產(chǎn)品目錄頁面: 782 (CN2011-ZH PDF)
AD5308/AD5318/AD5328
Rev. F | Page 5 of 28
A Version1
B Version1
Parameter2
Min
Typ
Max
Min
Typ
Max
Unit
Conditions/Comments
Short Circuit Current
25.0
mA
VDD = 5 V
16.0
mA
VDD = 3 V
Power-Up Time
2.5
μs
Coming out of power-down
mode, VDD = 5 V
5.0
μs
Coming out of power-down
mode, VDD = 3 V
LOGIC INPUTS6
Input Current
±1
μA
VIL, Input Low Voltage
0.8
V
VDD = 5 V ± 10%
0.8
V
VDD = 3 V ± 10%
0.7
V
VDD = 2.5 V
VIH, Input High Voltage
1.7
V
VDD = 2.5 V to 5.5 V, TTL and
CMOS compatible
Pin Capacitance
3.0
pF
POWER REQUIREMENTS
VDD
2.5
5.5
2.5
5.5
V
IDD (Normal Mode)8
VIH = VDD and VIL = GND
VDD = 4.5 V to 5.5 V
1.0
1.8
1.0
1.8
mA
All DACs in unbuffered
mode, in buffered mode
VDD = 2.5 V to 3.6 V
0.7
1.5
0.7
1.5
mA
Extra current is typically x μA
per DAC; x = (5 μA +
VREF/RDAC)/4
IDD (Power-Down Mode)9
VIH = VDD and VIL = GND
VDD = 4.5 V to 5.5 V
0.4
1
0.4
1
μA
VDD = 2.5 V to 3.6 V
0.12
1
0.12
1
μA
1 Temperature range (A, B version): 40°C to +125°C; typical at 25°C.
2 See the Terminology section.
3 DC specifications tested with the outputs unloaded unless stated otherwise.
4 Linearity is tested using a reduced code range: AD5308 (Code 8 to Code 255), AD5318 (Code 28 to Code 1023), and AD5328 (Code 115 to Code 4095).
5 This corresponds to x codes. x = deadband voltage/LSB size.
6 Guaranteed by design and characterization; not production tested.
7 For the amplifier output to reach its minimum voltage, offset error must be negative. For the amplifier output to reach its maximum voltage, VREF = VDD and offset plus
gain error must be positive.
8 Interface inactive. All DACs active. DAC outputs unloaded.
9 All eight DACs powered down.
VDD = 2.5 V to 5.5 V; RL = 2 kΩ to GND; CL = 200 pF to GND; all specifications TMIN to TMAX, unless otherwise noted.
Table 2. AC Characteristics1
A, B Version2
Parameter3
Min
Typ
Max
Unit
Conditions/Comments
Output Voltage Settling Time
VREF = VDD = 5 V
AD5308
6
8
μs
1/4 scale to 3/4 scale change (0x40 to 0xC0)
AD5318
7
9
μs
1/4 scale to 3/4 scale change (0x100 To 0x300)
AD5328
8
10
μs
1/4 scale to 3/4 scale change (0x400 to 0xC00)
Slew Rate
0.7
V/μs
Major-Code Change Glitch Energy
12
nV-sec
1 LSB change around major carry
Digital Feedthrough
0.5
nV-sec
Digital Crosstalk
0.5
nV-sec
Analog Crosstalk
1
nV-sec
DAC-to-DAC Crosstalk
3
nV-sec
Multiplying Bandwidth
200
kHz
VREF = 2 V ± 0.1 V p-p, unbuffered mode
Total Harmonic Distortion
70
dB
VREF = 2.5 V ± 0.1 V p-p, frequency = 10 kHz
1 Guaranteed by design and characterization; not production tested.
2 Temperature range (A, B version): –40°C to +125°C; typical at 25°C.
3 See the Terminology section.
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