- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄8678 > AD5323BRUZ-REEL7 (Analog Devices Inc)IC DAC 12BIT DUAL R-R 16-TSSOP PDF資料下載
參數(shù)資料
| 型號(hào)： | AD5323BRUZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 1/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT DUAL R-R 16-TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 設(shè)置時(shí)間： | 8µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 2.5mW |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-TSSOP |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電壓，單極；2 電壓，雙極 |
| 采樣率（每秒）： | 125k |
當(dāng)前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
2.5 V to 5.5 V, 230 μA, Dual Rail-to-Rail
Voltage Output 8-/10-/12-Bit DACs
AD5303/AD5313/AD5323
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
1999–2007 Analog Devices, Inc. All rights reserved.
FEATURES
AD5303: 2 buffered 8-bit DACs in 1 package
A version: ±1 LSB INL, B version: ±0.5 LSB INL
AD5313: 2 buffered 10-bit DACs in 1 package
A version: ±4 LSB INL, B version: ±2 LSB INL
AD5323: 2 buffered 12-bit DACs in 1 package
A version: ±16 LSB INL, B version: ±8 LSB INL
16-lead TSSOP package
Micropower operation: 300 μA @ 5 V (including reference
current)
Power-down to 200 nA @ 5 V, 50 nA @ 3 V
2.5 V to 5.5 V power supply
Double-buffered input logic
Guaranteed monotonic by design over all codes
Buffered/unbuffered reference input options
Output range: 0 V to VREF or 0 V to 2 VREF
Power-on-reset to 0 V
SDO daisy-chaining option
Simultaneous update of DAC outputs via LDAC pin
Asynchronous CLR facility
Low power serial interface with Schmitt-triggered inputs
On-chip rail-to-rail output buffer amplifiers
APPLICATIONS
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
GENERAL DESCRIPTION
The AD5303/AD5313/AD5323 are dual 8-/10-/12-bit buffered
voltage output DACs in a 16-lead TSSOP package that operate
from a single 2.5 V to 5.5 V supply, consuming 230 μA at 3 V.
Their on-chip output amplifiers allow the outputs to swing rail-to-
rail with a slew rate of 0.7 V/μs. The AD5303/AD5313/AD5323
utilize a versatile 3-wire serial interface that operates at clock
rates up to 30 MHz and is compatible with standard SPI, QSPI,
MICROWIRE, and DSP interface standards.
The references for the two DACs are derived from two reference
pins (one per DAC). These reference inputs may be configured
as buffered or unbuffered inputs. The parts incorporate a power-
on reset circuit, which ensures that the DAC outputs power up
to 0 V and remain there until a valid write to the device takes
place. There is also an asynchronous active low CLR pin that
clears both DACs to 0 V. The outputs of both DACs may be
updated simultaneously using the asynchronous LDAC input.
The parts contain a power-down feature that reduces the
current consumption of the devices to 200 nA at 5 V (50 nA
at 3 V) and provides software-selectable output loads while
in power-down mode. The parts may also be used in daisy-
chaining applications using the SDO pin.
The low power consumption of these parts in normal operation
makes them ideally suited to portable battery-operated equip-
ment. The power consumption is 1.5 mW at 5 V and 0.7 mW at
3 V, reducing to 1 μW in power-down mode.
FUNCTIONAL BLOCK DIAGRAM
DAC
REGISTER
POWER-DOWN
LOGIC
BUFFER
STRING
DAC
STRING
DAC
AD5303/AD5313/AD5323
INPUT
REGISTER
INPUT
REGISTER
DAC
REGISTER
INTERFACE
LOGIC
SCLK
POWER-ON
RESET
VDD
VREFA
VOUTA
VOUTB
GND
VREFB
LDAC
DIN
00
47
2-
0
01
SYNC
CLR
PD
BUF B
BUFFER
SDO
DCEN
BUF A
RESISTOR
NETWORK
RESISTOR
NETWORK
GAIN-SELECT
LOGIC
Figure 1.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| V300A12H500BF2 | CONVERTER MOD DC/DC 12V 500W |
| V300A12H500BF | CONVERTER MOD DC/DC 12V 500W |
| V300A12H500BL3 | CONVERTER MOD DC/DC 12V 500W |
| AD5346BRUZ | IC DAC 8BIT OCTAL VOUT 38TSSOP |
| VI-J5V-MY | CONVERTER MOD DC/DC 5.8V 50W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD5323BRUZ-REEL71 | 制造商:AD 制造商全稱:Analog Devices 功能描述:2.5 V to 5.5 V, 230 ??A, Dual Rail-to-Rail Voltage Output 8-/10-/12-Bit DACs |
| AD5323-EVAL | 制造商:Analog Devices 功能描述: |
| AD5324 | 制造商:AD 制造商全稱:Analog Devices 功能描述:2.5 V to 5.5 V, 500 uA, Parallel Interface Quad Voltage-Output 8-/10-/12-Bit DACs |
| AD5324ACPZ-REEL7 | 功能描述:IC DAC 12BIT QUAD VOUT 10LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時(shí)間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
| AD5324ARM | 功能描述:IC DAC 12BIT QUAD VOUT 10-MSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時(shí)間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。