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參數(shù)資料
| 型號： | AD5330BRU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | 2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs |
| 中文描述： | PARALLEL, 8 BITS INPUT LOADING, 6 us SETTLING TIME, 8-BIT DAC, PDSO20 |
| 封裝： | PLASTIC, TSSOP-20 |
| 文件頁數(shù)： | 8/20頁 |
| 文件大?。?/td> | 359K |
| 代理商： | AD5330BRU |
REV. 0
AD5330/AD5331/AD5340/AD5341
–8–
AD5341 FUNCTIONAL BLOCK DIAGRAM
V
OUT
BUFFER
12-BIT
DAC
GND
AD5341
PD
DAC
REGISTER
LOW BYTE
REGISTER
V
DD
HBEN
CS
WR
CLR
LDAC
RESET
POWER-ON
RESET
HIGH BYTE
REGISTER
POWER-DOWN
LOGIC
BUF
GAIN
DB
7
DB
0
.
INTER-
FACE
LOGIC
V
REF
AD5341 PIN FUNCTION DESCRIPTIONS
Pin
No.
Mnemonic
Function
1
HBEN
High Byte Enable Pin. This pin is used when writing to the device to determine if data is written
to the high byte register or the low byte register.
Buffer Control Pin. This pin controls whether the reference input to the DAC is buffered or unbuffered.
Reference Input.
Output of DAC. Buffered output with rail-to-rail operation.
Ground reference point for all circuitry on the part.
Active low Chip Select Input. This is used in conjunction with
WR
to write data to the parallel interface.
Active Low Write Input. This is used in conjunction with
CS
to write data to the parallel interface.
Gain Control Pin. This controls whether the output range from the DAC is 0–V
REF
or 0–2 V
REF.
Asynchronous active low control input that clears all input registers and DAC registers to zero.
Active low control input that updates the DAC registers with the contents of the input registers.
Power-Down Pin. This active low control pin puts the DAC into power-down mode.
Power Supply Input. These parts can operate from 2.5 V to 5.5 V and the supply should be decoupled
with a 10
μ
F capacitor in parallel with a 0.1
μ
F capacitor to GND.
Eight Parallel Data Inputs. DB
7
is the MSB of these eight bits.
2
3
4
5
6
7
8
9
10
11
12
BUF
V
REF
V
OUT
GND
CS
WR
GAIN
CLR
LDAC
PD
V
DD
13–20
DB
0
–DB
7
AD5341 PIN CONFIGURATION
TOP VIEW
(Not to Scale)
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
AD5341
LDAC
GAIN
WR
CS
GND
V
REF
V
OUT
PD
V
DD
DB
0
DB
1
DB
2
DB
3
DB
4
DB
5
DB
6
DB
7
12-BIT
CLR
HBEN
BUF
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD5331 | 2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs |
| AD5331BRU | 2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs |
| AD5335 | 2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs |
| AD5335BRU | 2.5 V to 5.5 V, 500 uA, Parallel Interface Quad Voltage-Output 8-/10-/12-Bit DACs |
| AD5336 | 2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs |
相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| AD5330BRU-REEL | 制造商:Analog Devices 功能描述:DAC 1-CH Resistor-String 8-bit 20-Pin TSSOP T/R |
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| AD5330BRUZ | 功能描述:IC DAC 8BIT SNGL VOUT 20-TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF) |
| AD5330BRUZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:2.5 V to 5.5 V, 115 ??A, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs |
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