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參數(shù)資料
| 型號： | AD5334BRUZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 16/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 8BIT QUAD VOUT 24-TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 62 |
| 設(shè)置時間： | 6µs |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 4.5mW |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-TSSOP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 4 電壓，單極；4 電壓，雙極 |
| 采樣率（每秒）： | 167k |
| 產(chǎn)品目錄頁面： | 782 (CN2011-ZH PDF) |
REV. 0
AD5334/AD5335/AD5336/AD5344
–5–
AD5334 FUNCTIONAL BLOCK DIAGRAM
VOUTA
BUFFER
GND
AD5334
VOUTB
BUFFER
VOUTC
BUFFER
VOUTD
BUFFER
POWER-ON
RESET
TO ALL DACS
AND BUFFERS
POWER-DOWN
LOGIC
PD
DAC
REGISTER
8-BIT
DAC
8-BIT
DAC
INPUT
REGISTER
VREFC/D
INTER-
FACE
LOGIC
VDD
VREFA/B
GAIN
DB7
DB0
CS
WR
A0
A1
CLR
LDAC
.
DAC
REGISTER
INPUT
REGISTER
DAC
REGISTER
INPUT
REGISTER
DAC
REGISTER
INPUT
REGISTER
8-BIT
DAC
8-BIT
DAC
8-BIT
DAC
AD5334 PIN FUNCTION DESCRIPTIONS
Pin
No.
Mnemonic
Function
1VREFC/D
Unbuffered Reference Input for DACs C and D.
2VREFA/B
Unbuffered Reference Input for DACs A and B.
3VOUTA
Output of DAC A. Buffered Output with Rail-to-Rail Operation.
4VOUTB
Output of DAC B. Buffered Output with Rail-to-Rail Operation.
5VOUTC
Output of DAC C. Buffered Output with Rail-to-Rail Operation.
6VOUTD
Output of DAC D. Buffered Output with Rail-to-Rail Operation.
7
GND
Ground Reference Point for All Circuitry on the Part.
8
CS
Active Low Chip Select Input. This is used in conjunction with
WR to write data to the parallel interface.
9
WR
Active Low Write Input. This is used in conjunction with
CS to write data to the parallel interface.
10
A0
LSB Address Pin for Selecting which DAC Is to Be Written to.
11
A1
MSB Address Pin for Selecting which DAC Is to Be Written to.
12
LDAC
Active Low Control Input that Updates the DAC Registers with the Contents of the Input Registers.
This allows all DAC outputs to be simultaneously updated.
13
PD
Power-Down Pin. This active low control pin puts all DACs into power-down mode.
14
VDD
Power Supply Pin. This part can operate from 2.5 V to 5.5 V and the supply should be decoupled with a
10
F capacitor in parallel with a 0.1 F capacitor to GND.
15–22
DB0–DB7
Eight Parallel Data Inputs. DB7 is the MSB of these eight bits.
23
GAIN
Gain Control Pin. This controls whether the output range from the DAC is 0–VREF or 0–2 VREF
24
CLR
Asynchronous Active Low Control Input that Clears All Input Registers and DAC Registers to Zeros.
AD5334 PIN CONFIGURATION
TOP VIEW
(Not to Scale)
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
AD5334
LDAC
A1
A0
WR
CS
VREFC/D
VREFA/B
VOUTA
VOUTB
GND
VOUTD
VOUTC
PD
VDD
DB0
DB1
DB2
CLR
GAIN
DB7
DB6
DB3
DB4
DB5
8-BIT
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| AD5334BRUZ-REEL | 功能描述:IC DAC 8BIT QUAD VOUT 24TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標準包裝:2,400 系列:- 設(shè)置時間:- 位數(shù):18 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:3 電壓電源:模擬和數(shù)字 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:36-TFBGA 供應(yīng)商設(shè)備封裝:36-TFBGA 包裝:帶卷 (TR) 輸出數(shù)目和類型:* 采樣率（每秒）:* |
| AD5334BRUZ-REEL7 | 功能描述:IC DAC 8BIT QUAD VOUT 24TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色產(chǎn)品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 標準包裝:91 系列:- 設(shè)置時間:4µs 位數(shù):10 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:8 電壓電源:單電源 功率耗散（最大）:2.7mW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:14-DFN-EP（4x3） 包裝:管件 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
| AD5335 | 制造商:AD 制造商全稱:Analog Devices 功能描述:2.5 V to 5.5 V, 500 uA, Parallel Interface Quad Voltage-Output 8-/10-/12-Bit DACs |
| AD5335BRU | 制造商:Analog Devices 功能描述:DAC 4-CH Resistor-String 10-bit 24-Pin TSSOP 制造商:Rochester Electronics LLC 功能描述:10-BIT,QUAD BYTE DAC, I.C - Bulk 制造商:Analog Devices 功能描述:10BIT DAC QUAD SMD 5335 TSSOP24 |
| AD5335BRU-REEL | 制造商:Analog Devices 功能描述:DAC 4-CH Resistor-String 10-bit 24-Pin TSSOP T/R |
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