參數(shù)資料
型號(hào): AD5341BRUZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 15/28頁(yè)
文件大?。?/td> 0K
描述: IC DAC 12BIT SNGL VOUT 20TSSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 75
設(shè)置時(shí)間: 8µs
位數(shù): 12
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 1.25mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 管件
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): 125k
AD5330/AD5331/AD5340/AD5341
Rev. A | Page 22 of 28
a system, all the DACs can be updated simultaneously using a
common LDAC line. A common CLR line can also be used to
reset all DAC outputs to zero.
ENABLE
CODED
ADDRESS
G1
A1
B1
VDD
VCC
74HC139
DGND
1Y0
1Y1
1Y2
1Y3
DATA
INPUTS
DAT
A
BUS
*AD5341 ONLY
LDAC
CLR
CS
HBEN*
AD5330/AD5331/
AD5340/AD5341
WR
LDAC
CLR
HBEN*
WR
DATA
INPUTS
LDAC
CLR
CS
HBEN*
AD5330/AD5331/
AD5340/AD5341
WR
DATA
INPUTS
LDAC
CLR
CS
HBEN*
AD5330/AD5331/
AD5340/AD5341
WR
DATA
INPUTS
LDAC
CLR
CS
HBEN*
AD5330/AD5331/
AD5340/AD5341
WR
06
85
2-
04
7
Figure 46. Decoding Multiple DAC Devices
PROGRAMMABLE CURRENT SOURCE
Figure 47 shows the AD5330/AD5331/AD5340/AD5341 used
as the control element of a programmable current source. In
this example, the full-scale current is set to 1 mA. The output
voltage from the DAC is applied across the current setting
resistor of 4.7 kΩ in series with the 470 Ω adjustment poten-
tiometer, which gives an adjustment of about ±5%. Suitable
transistors to place in the feedback loop of the amplifier include
the BC107 and the 2N3904, which enable the current source to
operate from a minimum VSOURCE of 6 V. The operating range is
determined by the operating characteristics of the transistor.
Suitable amplifiers include the AD820 and the OP295, both
having rail-to-rail operation on their outputs. The current for
any digital input code and resistor value can be calculated as
follows:
mA
)
2
(
R
D
V
G
I
N
REF
×
=
where:
G is the gain of the buffer amplifier (1 or 2).
D is the digital equivalent of the digital input code.
N is the DAC resolution (8, 10, or 12 bits).
R is the sum of the resistor plus adjustment potentiometer
in kilo ohms.
AD5330/AD5331/
AD5340/AD5341
VDD = 5V
4.7k
5V
470
LOAD
VSOURCE
VREF
VDD
GND
VOUT
AD820/
OP295
+
0.1F
10F
0.1F
GND
EXT
REF
VOUT
VIN
AD780/REF192
WITH VDD = 5V
06
85
2-
048
Figure 47. Programmable Current Source
POWER SUPPLY BYPASSING AND GROUNDING
In any circuit where accuracy is important, careful consid-
eration of the power supply and ground return layout helps
to ensure the rated performance. The printed circuit board on
which the AD5330/AD5331/AD5340/AD5341 are mounted
should be designed so that the analog and digital sections are
separated and confined to certain areas of the board. If the
device is in a system where multiple devices require an AGND-
to-DGND connection, the connection should be made at one
point only. The star ground point should be established as
closely as possible to the device. The AD5330/AD5331/
AD5340/AD5341 should have ample supply bypassing of
10 μF in parallel with 0.1 μF on the supply located as close to
the package as possible, ideally right up against the device.
The 10 μF capacitors are the tantalum bead type. The 0.1 μF
capacitor should have low effective series resistance (ESR) and
effective series inductance (ESI), like the common ceramic
types that provide a low impedance path to ground at high
frequencies to handle transient currents due to internal logic
switching.
The power supply lines of the device should use as large a trace
as possible to provide low impedance paths and reduce the
effects of glitches on the power supply line. Fast switching
signals such as clocks should be shielded with digital ground
to avoid radiating noise to other parts of the board, and should
never be run near the reference inputs. Avoid crossover of
digital and analog signals. Traces on opposite sides of the board
should run at right angles to each other. This reduces the effects
of feedthrough through the board. A microstrip technique is by
far the best, but not always possible with a double-sided board.
In this technique, the component side of the board is dedicated to
the ground plane while signal traces are placed on the solder side.
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