- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄8970 > AD5348BRUZ (Analog Devices Inc)IC DAC 12BIT OCTAL VOUT 38-TSSOP PDF資料下載
參數(shù)資料
| 型號： | AD5348BRUZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 2/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT OCTAL VOUT 38-TSSOP |
| 產(chǎn)品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 50 |
| 設置時間： | 8µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉換器數(shù)目： | 8 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 8.3mW |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 38-TFSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 38-TSSOP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 8 電壓，單極；8 電壓，雙極 |
| 采樣率（每秒）： | 125k |
| 產(chǎn)品目錄頁面： | 782 (CN2011-ZH PDF) |
AD5346/AD5347/AD5348
Rev. 0 | Page 10 of 24
TERMINOLOGY
Relative Accuracy
For the DAC, relative accuracy or integral nonlinearity (INL) is
a measure of the maximum deviation, in LSBs, from a straight
line passing through the actual endpoints of the DAC transfer
function. Typical INL versus code plots can be seen in Figure 14,
Figure 15, and Figure 16.
Differential Nonlinearity
Differential nonlinearity (DNL) is the difference between the
measured change and the ideal 1 LSB change between any two
adjacent codes. A specified differential nonlinearity of ± 1 LSB
maximum ensures monotonicity. This DAC is guaranteed
monotonic by design. Typical DNL versus code plots can be
seen in Figure 17, Figure 18, and Figure 19.
Gain Error
This is a measure of the span error of the DAC, including any
error in the gain of the buffer amplifier. It is the deviation in
slope of the actual DAC transfer characteristic from the ideal
and is expressed as a percentage of the full-scale range. This is
illustrated in Figure 11.
Offset Error
This is a measure of the offset error of the DAC and the output
amplifier. It is expressed as a percentage of the full-scale range.
If the offset voltage is positive, the output voltage still positive at
zero input code. This is shown in Figure 12. Because the DACs
operate from a single supply, a negative offset cannot appear at
the output of the buffer amplifier. Instead, there is a code close
to zero at which the amplifier output saturates (amplifier
footroom). Below this code there is a dead band over which the
output voltage does not change. This is illustrated in Figure 13.
OUTPUT
VOLTAGE
DAC CODE
POSITIVE
GAIN ERROR
NEGATIVE
GAIN ERROR
ACTUAL
IDEAL
03331-0-011
Figure 11. Gain Error
OUTPUT
VOLTAGE
DAC CODE
POSITIVE
OFFSET
GAIN ERROR
AND
OFFSET
ERROR
ACTUAL
IDEAL
03331-0-012
Figure 12. Positive Offset Error and Gain Error
AMPLIFIER
FOOTROOM
(~1mV)
NEGATIVE
OFFSET
OUTPUT
VOLTAGE
DAC CODE
GAIN ERROR
AND
OFFSET
ERROR
DEADBAND CODES
ACTUAL
IDEAL
NEGATIVE
OFFSET
03331-0-013
Figure 13. Negative Offset Error and Gain Error
相關PDF資料 |
PDF描述 |
|---|---|
| SI5338N-A-GM | IC CLK GEN I2C BUS PROG 24QFN |
| AD9761ARSZ | IC DAC 10BIT DUAL 40MSPS 28-SSOP |
| VI-J0R-MZ-F2 | CONVERTER MOD DC/DC 7.5V 25W |
| SI5338K-A-GM | IC CLK GEN I2C BUS PROG 24QFN |
| D38999/20KF32PC | CONN RCPT 32POS WALL MNT W/PINS |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD5348BRUZRUZ | 制造商:Analog Devices 功能描述:DAC,AD5348B 12bit 8us octal TSSOP |
| AD534J | 制造商:AD 制造商全稱:Analog Devices 功能描述:Internally Trimmed Precision IC Multiplier |
| AD534JD | 功能描述:IC TRIMMED MULTIPLIER/DIV 14-DIP RoHS:否 類別:集成電路 (IC) >> 線性 - 模擬乘法器，除法器 系列:- 標準包裝:25 系列:HA 功能:模擬乘法器 位元/級數(shù):四象限 封裝/外殼:16-CDIP（0.300"，7.62mm） 供應商設備封裝:16-CDIP 側面銅焊 包裝:管件 |
| AD534JD/+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog Multiplier/Divider |
| AD534JDZ | 功能描述:IC MULTIPLIER PREC TRIM 14-CDIP RoHS:是 類別:集成電路 (IC) >> 線性 - 模擬乘法器，除法器 系列:- 標準包裝:25 系列:HA 功能:模擬乘法器 位元/級數(shù):四象限 封裝/外殼:16-CDIP（0.300"，7.62mm） 供應商設備封裝:16-CDIP 側面銅焊 包裝:管件 |
發(fā)布緊急采購，3分鐘左右您將得到回復。