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參數(shù)資料
| 型號： | AD538BD |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | Real-Time Analog Computational Unit ACU |
| 中文描述： | ANALOG MULTIPLE FUNCTIONS, 0.4 MHz BAND WIDTH, CDIP18 |
| 封裝： | SIDE BRAZED, CERAMIC, DIP-18 |
| 文件頁數(shù)： | 6/11頁 |
| 文件大小： | 167K |
| 代理商： | AD538BD |
AD538
–6–
REV. C
25k
V
25k
V
LOG
RATIO
100
V
25k
V
25k
V
ANTILOG
LOG
OUTPUT
100
V
AD538
INTERNAL
VOLTAGE
REFERENCE
I
V
O
I
Z
V
Z
B
+10V
–V
S
+V
S
+2V
I
Y
A
D
I
X
V
X
C
PWR
GND
SIGNAL
GND
V
Y
1
18
17
16
15
14
13
12
11
10
2
3
4
5
6
7
8
9
Figure 9. Functional Block Diagram
FUNCTIONAL DESCRIPTION
As shown in Figures 9 and 10, the V
Z
and V
X
inputs connect
directly to the AD538’s input log ratio amplifiers. This subsec-
tion provides an output voltage proportional to the natural log
of input voltage V
Z
, minus the natural log of input voltage V
X
.
The output of the log ratio subsection at B can be expressed by
the transfer function:
V
B
=
kT
q
ln
V
Z
V
X
where
k
= 1.3806
×
10
–23
J/K,
q
= 1.60219
×
10
–19
C,
T
is in Kelvins.
The log ratio configuration may be used alone, if correctly tem-
perature compensated and scaled to the desired output level
(see Applications section).
Under normal operation, the log-ratio output will be directly
connected to a second functional block at input C, the antilog
subsection. This section performs the antilog according to the
transfer function:
V
O
=
V
Y
e
V
C
q
kT
As with the log-ratio circuit included in the AD538, the user
may use the antilog subsection by itself. When both subsections
are combined, the output at B is tied to C, the transfer function
of the AD538 computational unit is:
V
O
=
V
Y
e
kT
q
q
kT
ln
V
Z
V
X
;
V
B
=
V
C
which reduces to:
V
V
V
V
O
Y
Z
X
=
Finally, by increasing the gain, or attenuating the output of the
log ratio subsection via resistor programming, it is possible to
raise the quantity V
Z
/V
X
to the
m
th
power. Without external
programming,
m
is unity. Thus the overall AD538 transfer
function equals:
V
O
=
V
Y
V
Z
V
X
m
where 0.2 <
m
< 5.
When the AD538 is used as an analog divider, the V
Y
input can
be used to multiply the ratio V
Z
/V
X
by a convenient scale factor.
The actual multiplication by the V
Y
input signal is accomplished
by adding the log of the V
Y
input signal to the signal at C, which
is already in the log domain.
INPUT FREQUENCY – Hz
150
100
100
10
1.0
0.1
1k
10k
100k
1M
V
X
= 10V
V
Y
= 5V +5V SIN
v
t VOLTS
V
Z
= 0V
V
O
Figure 7. V
Y
Feedthrough vs. Frequency
DC OUTPUT VOLTAGE – Volts
100
0.01
V
n
m
V
H
10
1
0.10
0.01
0.1
1
10
FOR THE FREQUENCY RANGE OF 10Hz
TO 100kHz THE TOTAL RMS OUTPUT
NOISE, e
, FOR A GIVEN BANDWIDTH
Bw, IS CALCULATED e
o
= e
n
Bw
V
X
= 10V
V
X
= 0.01V
Figure 8. 1 kHz Output Noise Spectral Density vs. DC Output
Voltage
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