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參數(shù)資料
| 型號(hào)： | AD5449YRUZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 18/29頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC DUAL 12BIT MULT 16TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 設(shè)置時(shí)間： | 80ns |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 3.5µW |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-TSSOP |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 4 電流，單極；4 電流，雙極 |
| 采樣率（每秒）： | 2.47M |
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AD5429/AD5439/AD5449
Data Sheet
Rev. E | Page 24 of 28
PCB LAYOUT AND POWER SUPPLY DECOUPLING
In any circuit where accuracy is important, careful considera-
tion of the power supply and ground return layout helps to
ensure the rated performance. The printed circuit board on
which the AD5429/AD5439/AD5449 is mounted should be
designed so that the analog and digital sections are separate
and confined to certain areas of the board. If the DAC is in a
system where multiple devices require an AGND-to-DGND
connection, the connection should be made at one point only.
The star ground point should be established as close as possible
to the device.
The DAC should have ample supply bypassing of 10 F in parallel
with 0.1 F on the supply, located as close as possible to the
package, ideally right up against the device. The 0.1 F capacitor
should have low effective series resistance (ESR) and low effective
series inductance (ESI), such as the common ceramic types of
capacitors that provide a low impedance path to ground at high
frequencies, to handle transient currents due to internal logic
switching. Low ESR, 1 F to 10 F tantalum or electrolytic
capacitors should also be applied at the supplies to minimize
transient disturbance and filter out low frequency ripple.
Components, such as clocks, that produce fast-switching signals,
should be shielded with digital ground to avoid radiating noise
to other parts of the board, and they should never be run near
the reference inputs.
Avoid crossover of digital and analog signals. Traces on opposite
sides of the board should run at right angles to each other. This
layout reduces the effects of feedthrough on the board. A micro-
strip technique is by far the best method, but its use is not always
possible with a double-sided board. In this technique, the compo-
nent side of the board is dedicated to the ground plane, and
signal traces are placed on the soldered side.
It is good practice to use compact, minimum lead-length PCB
layout design. Leads to the input should be as short as possible
to minimize IR drops and stray inductance.
The PCB metal traces between VREFx and RFBx should also be
matched to minimize gain error. To maximize high frequency
performance, the I-to-V amplifier should be located as close as
possible to the device.
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