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參數(shù)資料
| 型號： | AD5453YUJ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | 5 #22 PVC PVC RoHS Compliant: Yes |
| 中文描述： | SERIAL INPUT LOADING, 0.18 us SETTLING TIME, 14-BIT DAC, PDSO8 |
| 封裝： | TSOT-8 |
| 文件頁數(shù)： | 2/16頁 |
| 文件大?。?/td> | 125K |
| 代理商： | AD5453YUJ |
–2–
REV. PrD
AD5450/AD5451/AD5452/AD5453–SPECIFICATIONS
1
(V
DD
= 2.5 V to 5.5 V, V
REF
= +10 V, I
OUT
x = OV. All specifications T
MN
to T
MAX
unless otherwse noted. DC performance measured wth
OP1177, AC performance wth AD9631 unless otherwse noted.)
PRELIMINARY TECHNICAL DATA
P arameter
M in
T yp
M ax
Units
C onditions
ST AT IC
A D 5450
R esolution
Relative Accuracy
D ifferential Nonlinearity
A D 5451
R esolution
Relative Accuracy
D ifferential Nonlinearity
A D 5452
R esolution
Relative Accuracy
D ifferential Nonlinearity
A D 5453
R esolution
Relative Accuracy
D ifferential Nonlinearity
T otal Unadjusted E rror
G ain E rror
Gain E rror T emp C oefficient
2
Output L eakage C urrent
PE RF ORM ANC E
8
± 0.25
±
Bits
L S B
L S B
G uaranteed M onotonic
10
± 0.25
±
Bits
L S B
L S B
G uaranteed M onotonic
12
± 0.5
±
Bits
L S B
L S B
G uaranteed M onotonic
14
± 2
± 1
± 2.44
± 1.22
Bits
L S B
L S B
mV
mV
ppm FSR/°C
nA
nA
V
G uaranteed M onotonic
± 5
± 10
± 50
Data = 0000
H
, T
A
= 25°C, I
OUT 1
Data = 0000
H
, I
OUT 1
Output Voltage Compliance Range
1.23
RE F E RE NC E INPU T
2
Reference Input Range
V
REF
Input Resistance
D IGIT AL INPUT S
2
Input High Voltage, V
IH
± 10
9.3
V
k
8
12
Input resistance T C = -50ppm/°C
2.0
1.7
V
V
V
V
μ
A
pF
V
DD
= 3.6 V to 5 V
V
DD
= 2.5 V to 3.6 V
V
DD
= 2.7 V to 5.5 V
V
DD
= 2.5 V to 2.7 V
Input L ow Voltage, V
IL
0.8
0.7
1
10
Input L eakage C urrent, I
IL
Input C apacitance
D Y NAM IC
Reference Multiplying BW
Output Voltage Settling T ime
PE RF ORM ANC E
2
10
MHz
V
REF
= +/-3.5V, DAC loaded all 1s
V
REF
= 10V, R
LOAD
= 100
, C
LOAD
= 15pF
DAC latch alternately loaded with 0s and 1s.
Measured to +/-16mV of FS
Measured to +/-4mV of FS
Measured to +/-1mV of FS
Measured to +/-1mV of FS
Interface delay time
Rise and Fall time, V
REF
= 10V, R
LOAD
=
100
,
C
L OAD
= 15pF
1 L SB change around Major C arry, V
REF
=0V
DAC latch loaded with all 0s.
Reference = 1M H z.
Reference = 10M H z.
AD5450
AD5451
AD5452
AD5453
D igital D elay
10% to 90% D ettling T ime
100
110
160
180
20
10
ns
ns
ns
ns
ns
ns
40
30
Digital to Analog Glitch Impulse
M ultiplying F eedthrough E rror
3
nV -s
-75
dB
Output C apacitance
IOUT 1
5
10
10
5
0.1
pF
pF
pF
pF
nV -s
DAC L atches L oaded with all 0s
DAC L atches L oaded with all 1s
DAC L atches L oaded with all 0s
DAC L atches L oaded with all 1s
Feedthrough to DAC output with
C S
high
and Alternate L oading of all 0s and all 1s.
IOUT 2
D igital F eedthrough
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