參數(shù)資料
型號: AD5541ARZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 7/20頁
文件大小: 0K
描述: IC DAC 16BIT SRL IN/VOUT 8-SOIC
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
設(shè)計資源: How to Achieve High Precision Voltage Level Setting Using AD5541A/42A (CN0169)
標(biāo)準(zhǔn)包裝: 1,000
系列: nanoDAC™
設(shè)置時間: 1µs
位數(shù): 16
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 825µW
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): 1.5M
Data Sheet
AD5541/AD5542
Rev. F | Page 15 of 20
APPLICATIONS INFORMATION
OPTOCOUPLER INTERFACE
The digital inputs of the AD5541/AD5542 are Schmitt-triggered so
that they can accept slow transitions on the digital input lines.
This makes these parts ideal for industrial applications where it
may be necessary to isolate the DAC from the controller via
optocouplers. Figure 29 illustrates such an interface.
10k
10F
0.1F
VDD
VOUT
VDD
SCLK
POWER
10k
VDD
CS
DIN
GND
SCLK
10k
VDD
DIN
5V
REGULATOR
AD5541/AD5542
07557-
029
Figure 29. AD5541/AD5542 in an Optocoupler Interface
DECODING MULTIPLE AD5541/AD5542s
The CS pin of the AD5541/AD5542 can be used to select one of
a number of DACs. All devices receive the same serial clock and
serial data, but only one device receives the CS signal at any one
time. The DAC addressed is determined by the decoder. There is
some digital feedthrough from the digital input lines. Using a
burst clock minimizes the effects of digital feedthrough on the
analog signal channels. Figure 30 shows a typical circuit.
AD5541/AD5542
CS
DIN
SCLK
VOUT
AD5541/AD5542
CS
DIN
SCLK
VOUT
AD5541/AD5542
CS
DIN
SCLK
VOUT
AD5541/AD5542
CS
DIN
SCLK
VOUT
VDD
DGND
EN
CODED
ADDRESS
SCLK
DIN
ENABLE
DECODER
07557-
030
Figure 30. Addressing Multiple AD5541/AD5542s
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