參數(shù)資料
型號(hào)： AD5544BRSZ-REEL7
廠商： Analog Devices Inc
文件頁數(shù)： 8/24頁
文件大小： 0K
描述： IC DAC 16BIT QUAD SRL 28SSOP
標(biāo)準(zhǔn)包裝： 500
設(shè)置時(shí)間： 900ns
位數(shù)： 16
數(shù)據(jù)接口： 串行，SPI?
轉(zhuǎn)換器數(shù)目： 4
電壓電源： 雙 ±
功率耗散（最大）： 1.25mW
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 28-SSOP（0.209"，5.30mm 寬）
供應(yīng)商設(shè)備封裝： 28-SSOP
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 4 電流，單極；4 電流，雙極
AD5544/AD5554
Data Sheet
Rev. G | Page 16 of 24
TRUTH TABLES
Table 8. AD55441 Control Logic Truth Table
CS
CLK
LDAC
RS
MSB2
Serial Shift Register Function3
Input Register Function
DAC Register
High
X
High
X
No effect
Latched
Low
High
X
No effect
Latched
Low
High
X
Shift register data advanced one bit
Latched
Low
High
X
No effect
Latched
Low
High
X
No effect
Selected DAC updated with
current shift register contents4
Latched
High
X
Low
High
X
No effect
Latched
Transparent
High
X
High
X
No effect
Latched
High
X
High
X
No effect
Latched
High
X
High
Low
0
No effect
Latched data = 0x0000
High
X
High
Low
High
No effect
Latched data = 0x8000
1
For the AD5544, data appears at the SDO pin 19 clock pulses after input at the SDI pin.
2
X = don’t care.
3
+is a positive logic transition.
4
At power-on, both the input register and the DAC register are loaded with all 0s.
Table 9. AD55541 Control Logic Truth Table
CS
CLK
LDAC
RS
MSB2
Serial Shift Register Function3
Input Register Function3
DAC Register
High
X
High
X
No effect
Latched
Low
L
High
X
No effect
Latched
Low
High
X
Shift register data advanced one bit
Latched
Low
High
X
No effect
Latched
Low
High
X
No effect
Selected DAC updated with
current shift register contents4
Latched
High
X
Low
High
X
No effect
Latched
Transparent
High
X
High
X
No effect
Latched
High
X
High
X
No effect
Latched
High
X
High
Low
0
No effect
Latched data = 0x0000
High
X
High
Low
High
No effect
Latched data = 0x2000
1
For the AD5554, data appears at the SDO pin 17 clock pulses after input at the SDI pin.
2
X = don’t care.
3
+is a positive logic transition.
4
At power-on, both the input register and the DAC register are loaded with all 0s.
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