V
參數(shù)資料
型號(hào): AD5583YRVZ
廠商: Analog Devices Inc
文件頁數(shù): 19/20頁
文件大?。?/td> 0K
描述: IC DAC 10BIT QUAD VOUT 48-TSSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 39
設(shè)置時(shí)間: 5µs
位數(shù): 10
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 模擬和數(shù)字,雙 ±
功率耗散(最大): 30mW
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 48-TFSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 48-TSSOP
包裝: 管件
輸出數(shù)目和類型: 4 電壓,單極;4 電壓,雙極
采樣率(每秒): 200k
產(chǎn)品目錄頁面: 783 (CN2011-ZH PDF)
REV. A
–8–
AD5582/AD5583
AD5583 PIN CONFIGURATION
1
AD5583
AGND1
48
TOP VIEW
(Not to Scale)
AGND2
2
VOB
47
VOC
3
VDD1
46
VDD2
4
VSS1
45
VSS2
5
VOA
44
VOD
6
NC
43
NC
7
VREFLB
42
VREFLC
8
VREFHB
41
VREFHC
9
VREFHA
40
VREFHD
10
VREFLA
39
VREFLD
11
R1
38
VDD3
12
RCT
37
VSS3
13
R2
36
DGND3
14
DVDD
35
R/
W
15
LDAC
34
CS
16
RS
33
A1
17
MSB
32
A0
18
NC
31
DB9
19
NC
30
DB8
20
DB0
29
DB7
21
DB1
28
DB6
22
DGND1
27
DGND2
23
DB2
26
DB5
24
DB3
25
DB4
NC = NO CONNECT
AD5583 PIN FUNCTION DESCRIPTIONS
*
Pin
No. Mnemonic Description
1
AGND1
Analog Ground for DAC A and B
2
VOB
DAC B Output
3VDD1
Positive Power Supply for DAC A and B
4VSS1
Negative Power Supply for DAC A and B
5
VOA
DAC A Output
6NCNo Connect (Do Not Connect Anything
other than Dummy Pad)
7VREFLB
DAC B Voltage Reference Low Terminal
8VREFHB
DAC B Voltage Reference High Terminal
9VREFHA
DAC A Voltage Reference High Terminal
10
VREFLA
DAC A Voltage Reference Low Terminal
11
R1
R1 Terminal (for Negative Reference)
12
RCT
Center Tap Terminal (for Negative Reference)
13
R2
R2 Terminal (for Negative Reference)
14
DVDD
Power Supply for Digital Circuits
15
LDAC
DAC Register Load, Active Low Level Sensitive
16
RS
Reset Strobe
17
MSB
MSB = 0, Reset to 000H.
MSB = 1, Reset to 200H.
18
NC
No Connect (Do Not Connect Anything
other than Dummy Pad)
19
NC
No Connect (Do Not Connect Anything
other than Dummy Pad)
20
DB0
Data Bit 0
21
DB1
Data Bit 1
22
DGND1
Digital Ground 1
23
DB2
Data Bit 2
24
DB3
Data Bit 3
Pin
No. Mnemonic Description
25
DB4
Data Bit 4
26
DB5
Data Bit 5
27
DGND2
Digital Ground 2
28
DB6
Data Bit 6
29
DB7
Data Bit 7
30
DB8
Data Bit 8
31
DB9
Data Bit 9
32
A0
Address Input 0
33
A1
Address Input 1
34
CS
Chip Select, Active Low
35
R/
W
Read/Write Mode Select
36
DGND3
Digital Ground 3
37
VSS3
Negative Power Supply for Analog Switches
38
VDD3
Positive Power Supply for Analog Switches
39
VREFLD
DAC D Voltage Reference Low Terminal
40
VREFHD
DAC D Voltage Reference High Terminal
41
VREFHC
DAC C Voltage Reference High Terminal
42
VREFLC
DAC C Voltage Reference Low Terminal
43
NC
No Connect (Do Not Connect Anything
other than Dummy Pad)
44
VOD
DAC D Output
45
VSS2
Negative Power Supply for DAC C and D
46
VDD2
Positive Power Supply for DAC C and D
47
VOC
DAC C Output
48
AGND2
Analog Ground for DAC C and D
*AD5583 optimizes internal layout design to reduce die area so that all supply voltage pins are required to be connected externally. See Figure 5.
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