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參數(shù)資料
| 型號(hào)： | AD558KN |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 6/8頁(yè) |
| 文件大小： | 0K |
| 描述： | IC DAC 8BIT 5-15V IN MONO 16DIP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 25 |
| 系列： | DACPORT® |
| 設(shè)置時(shí)間： | 800ns |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 375mW |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類(lèi)型： | 通孔 |
| 封裝/外殼： | 16-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 16-PDIP |
| 包裝： | 管件 |
| 輸出數(shù)目和類(lèi)型： | 1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | * |
AD558
REV. A
–6–
tW
2.0V
0.8V
tDS
tDH
DATA
INPUTS
CS OR CE
tSETTLING
1/2 LSB
DAC
V OUTPUT
tW = STORAGE PULSE WIDTH = 200ns MIN
t
DH = DATA HOLD TIME = 10ns MIN
t
DS = DATA SETUP TIME = 200ns MIN
t
SETTLING = DAC OUTPUT SETTLING TIME TO ±1/2 LSB
Figure 7. AD558 Timing
USE OF VOUT SENSE
Separate access to the feedback resistor of the output amplifier
allows additional application versatility. Figure 8a shows how
I
× R drops in long lines to remote loads may be cancelled by
putting the drops “inside the loop.” Figure 8b shows how the
separate sense may be used to provide a higher output current
by feeding back around a simple current booster.
15
16
AD558
12
13
VOUT
14
RL
GND
GAIN
SELECT
SENSE
VOUT
0V TO +10V
a. Compensation for I
× R Drops in Output Lines
15
16
AD558
12
13
VOUT
RL
GND
GAIN
SELECT
SENSE
VOUT
0V TO +2.56V
VCC
2N2222
14
b. Output Current Booster
Figure 8. Use of VOUT Sense
OPTIMIZING SETTLING TIME
In order to provide single-supply operation and zero-based
output voltage ranges, the AD558 output stage has a passive
“pull-down” to ground. As a result, settling time for negative
going output steps may be longer than for positive-going output
steps. The relative difference depends on load resistance and
capacitance. If a negative power supply is available, the
negative-going settling time may be improved by adding a pull-
down resistor from the output to the negative supply as shown
in Figure 9. The value of the resistor should be such that, at
zero voltage out, current through that resistor is 0.5 mA max.
BIPOLAR OUTPUT RANGES
The AD558 was designed for operation from a single power
supply and is thus capable of providing only unipolar (0 V to
+2.56 V and 0 V to 10 V) output ranges. If a negative supply is
15
16
AD558
VOUT
RL
SENSE
VOUT
VEE
NEGATIVE
SUPPLY
RP-D = 2x VEE
(in k
)
Figure 9. Improved Settling Time
available, bipolar output ranges may be achieved by suitable
output offsetting and scaling. Figure 10 shows how a
±1.28 volt
output range may be achieved when a –5 volt power supply is
available. The offset is provided by the AD589 precision 1.2 volt
reference which will operate from a +5 volt supply. The AD544
output amplifier can provide the necessary
±1.28 volt output
swing from
±5 volt supplies. Coding is complementary offset
binary.
14
15
16
AD558
12
13
AD589
AD544
0.01
F
0.01
F
0.01
F
–5V
–1.2V
4.7k
5k
4.53k
–5V
INPUT CODE
V
OUT
00000000
+128V
10000000
0V
11111111
–1.27V
1.5k
V
O
+1.28 TO
–1.27
5k
+5V
500
BIPOLAR
OFFSET
ADJUST
V
IN
V
OUT = 0V TO +2.56V
Figure 10. Bipolar Operation of AD558 from
±5 V Supplies
MEASURING OFFSET ERROR
One of the most commonly specified endpoint errors associated
with real-world nonideal DACs is offset error.
In most DAC testing, the offset error is measured by applying
the zero-scale code and measuring the output deviation from 0
volts. There are some DACs, like the AD558 where offset errors
may be present but not observable at the zero scale, because of
other circuit limitations (such as zero coinciding with single-
supply ground) so that a nonzero output at zero code cannot be
read as the offset error. Factors like this make testing the
AD558 a little more complicated.
By adding a pulldown resistor from the output to a negative
supply as shown in Figure 11, we can now read offset errors
at zero code that may not have been observable due to circuit
limitations. The value of the resistor should be such that, at zero
voltage out, current through the resistor is 0.5 mA max.
OUTPUT
AMP
16
15
14
13
AGND
VOUT SELECT
VOUT SENSE
VOUT
–V
0.5mA
a. 0 V to 2.56 V Output Range
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD558KN/+ | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD558KNZ | 功能描述:IC DAC 8BIT 5-15V IN MONO 16DIP RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:DACPORT® 標(biāo)準(zhǔn)包裝:1 系列:- 設(shè)置時(shí)間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類(lèi)型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類(lèi)型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱(chēng):MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| AD558KNZ | 制造商:Analog Devices 功能描述:D/A Converter (D-A) IC |
| AD558KP | 功能描述:IC DAC 8BIT 5-15V IN MONO 20PLCC RoHS:否 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:DACPORT® 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類(lèi)型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| AD558KP-REEL7 | 功能描述:IC DAC 8BIT 5-15V IN MONO 20PLCC RoHS:否 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:DACPORT® 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類(lèi)型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
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